Difference between revisions of "NVIDIA Patent Application Trends in 2024"
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* [[:Category:CPC_G06T2207/20084|G06T2207/20084]] | * [[:Category:CPC_G06T2207/20084|G06T2207/20084]] | ||
** Count: 37 patents | ** Count: 37 patents | ||
| − | ** Example: [[:20240104698. NEURAL NETWORK-BASED PERTURBATION REMOVAL|20240104698. NEURAL NETWORK-BASED PERTURBATION REMOVAL]] | + | ** Example: [[:20240104698. NEURAL NETWORK-BASED PERTURBATION REMOVAL simplified abstract (NVIDIA CORPORATION)|20240104698. NEURAL NETWORK-BASED PERTURBATION REMOVAL simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06N3/08|G06N3/08]] | * [[:Category:CPC_G06N3/08|G06N3/08]] | ||
** Count: 35 patents | ** Count: 35 patents | ||
| − | ** Example: [[:20240119267. GENERATING NEURAL NETWORKS|20240119267. GENERATING NEURAL NETWORKS]] | + | ** Example: [[:20240119267. GENERATING NEURAL NETWORKS simplified abstract (NVIDIA CORPORATION)|20240119267. GENERATING NEURAL NETWORKS simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06V10/82|G06V10/82]] | * [[:Category:CPC_G06V10/82|G06V10/82]] | ||
** Count: 34 patents | ** Count: 34 patents | ||
| − | ** Example: [[:20240233146. IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION|20240233146. IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION]] | + | ** Example: [[:20240233146. IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION simplified abstract (NVIDIA CORPORATION)|20240233146. IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06T2207/20081|G06T2207/20081]] | * [[:Category:CPC_G06T2207/20081|G06T2207/20081]] | ||
** Count: 30 patents | ** Count: 30 patents | ||
| − | ** Example: [[:20240020863. OPTICAL CHARACTER DETECTION AND RECOGNITION|20240020863. OPTICAL CHARACTER DETECTION AND RECOGNITION]] | + | ** Example: [[:20240020863. OPTICAL CHARACTER DETECTION AND RECOGNITION simplified abstract (NVIDIA CORPORATION)|20240020863. OPTICAL CHARACTER DETECTION AND RECOGNITION simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06T1/20|G06T1/20]] | * [[:Category:CPC_G06T1/20|G06T1/20]] | ||
** Count: 30 patents | ** Count: 30 patents | ||
| − | ** Example: [[:20240013893. ACCELERATING TRANSFER AND PROCESSING OF IMAGING INFORMATION WITH DATA PROCESSING UNIT|20240013893. ACCELERATING TRANSFER AND PROCESSING OF IMAGING INFORMATION WITH DATA PROCESSING UNIT]] | + | ** Example: [[:20240013893. ACCELERATING TRANSFER AND PROCESSING OF IMAGING INFORMATION WITH DATA PROCESSING UNIT simplified abstract (NVIDIA CORPORATION)|20240013893. ACCELERATING TRANSFER AND PROCESSING OF IMAGING INFORMATION WITH DATA PROCESSING UNIT simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06T15/06|G06T15/06]] | * [[:Category:CPC_G06T15/06|G06T15/06]] | ||
** Count: 22 patents | ** Count: 22 patents | ||
| − | ** Example: [[:20240095996. EFFICIENCY OF RAY-BOX TESTS|20240095996. EFFICIENCY OF RAY-BOX TESTS]] | + | ** Example: [[:20240095996. EFFICIENCY OF RAY-BOX TESTS simplified abstract (NVIDIA CORPORATION)|20240095996. EFFICIENCY OF RAY-BOX TESTS simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06F9/544|G06F9/544]] | * [[:Category:CPC_G06F9/544|G06F9/544]] | ||
** Count: 18 patents | ** Count: 18 patents | ||
| − | ** Example: [[:20240176684. APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS|20240176684. APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS]] | + | ** Example: [[:20240176684. APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS simplified abstract (NVIDIA CORPORATION)|20240176684. APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06T2207/10024|G06T2207/10024]] | * [[:Category:CPC_G06T2207/10024|G06T2207/10024]] | ||
** Count: 16 patents | ** Count: 16 patents | ||
| − | ** Example: [[:20240233315. REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS|20240233315. REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS]] | + | ** Example: [[:20240233315. REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS simplified abstract (NVIDIA CORPORATION)|20240233315. REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06T1/60|G06T1/60]] | * [[:Category:CPC_G06T1/60|G06T1/60]] | ||
** Count: 15 patents | ** Count: 15 patents | ||
| − | ** Example: [[:20240104790. OPTIMIZING GRID-BASED COMPUTE GRAPHS|20240104790. OPTIMIZING GRID-BASED COMPUTE GRAPHS]] | + | ** Example: [[:20240104790. OPTIMIZING GRID-BASED COMPUTE GRAPHS simplified abstract (NVIDIA CORPORATION)|20240104790. OPTIMIZING GRID-BASED COMPUTE GRAPHS simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06T7/70|G06T7/70]] | * [[:Category:CPC_G06T7/70|G06T7/70]] | ||
** Count: 14 patents | ** Count: 14 patents | ||
| − | ** Example: [[:20240177394. MOTION VECTOR OPTIMIZATION FOR MULTIPLE REFRACTIVE AND REFLECTIVE INTERFACES|20240177394. MOTION VECTOR OPTIMIZATION FOR MULTIPLE REFRACTIVE AND REFLECTIVE INTERFACES]] | + | ** Example: [[:20240177394. MOTION VECTOR OPTIMIZATION FOR MULTIPLE REFRACTIVE AND REFLECTIVE INTERFACES simplified abstract (NVIDIA CORPORATION)|20240177394. MOTION VECTOR OPTIMIZATION FOR MULTIPLE REFRACTIVE AND REFLECTIVE INTERFACES simplified abstract (NVIDIA CORPORATION)]] |
== Emerging Technology Areas == | == Emerging Technology Areas == | ||
[[File:Nvidia Top Emerging Technology Areas 2024 - Up to June 2024.png|border|800px|Nvidia Top Emerging Technology Areas 2024 - Up to June 2024]] | [[File:Nvidia Top Emerging Technology Areas 2024 - Up to June 2024.png|border|800px|Nvidia Top Emerging Technology Areas 2024 - Up to June 2024]] | ||
* [[:Category:CPC_H05K7/20909|H05K7/20909]] | * [[:Category:CPC_H05K7/20909|H05K7/20909]] | ||
** Count: 1 patents | ** Count: 1 patents | ||
| − | ** Example: [[:20240049380. POWER ARRANGEMENT AND COOLING SYSTEM FOR ELECTRONIC DEVICES|20240049380. POWER ARRANGEMENT AND COOLING SYSTEM FOR ELECTRONIC DEVICES]] | + | ** Example: [[:20240049380. POWER ARRANGEMENT AND COOLING SYSTEM FOR ELECTRONIC DEVICES simplified abstract (NVIDIA CORPORATION)|20240049380. POWER ARRANGEMENT AND COOLING SYSTEM FOR ELECTRONIC DEVICES simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_H05K7/209|H05K7/209]] | * [[:Category:CPC_H05K7/209|H05K7/209]] | ||
** Count: 1 patents | ** Count: 1 patents | ||
| Line 50: | Line 50: | ||
* [[:Category:CPC_G06F21/31|G06F21/31]] | * [[:Category:CPC_G06F21/31|G06F21/31]] | ||
** Count: 1 patents | ** Count: 1 patents | ||
| − | ** Example: [[:20240046687. TECHNIQUES FOR VERIFYING USER IDENTITIES DURING COMPUTER-MEDIATED INTERACTIONS|20240046687. TECHNIQUES FOR VERIFYING USER IDENTITIES DURING COMPUTER-MEDIATED INTERACTIONS]] | + | ** Example: [[:20240046687. TECHNIQUES FOR VERIFYING USER IDENTITIES DURING COMPUTER-MEDIATED INTERACTIONS simplified abstract (NVIDIA CORPORATION)|20240046687. TECHNIQUES FOR VERIFYING USER IDENTITIES DURING COMPUTER-MEDIATED INTERACTIONS simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06V40/10|G06V40/10]] | * [[:Category:CPC_G06V40/10|G06V40/10]] | ||
** Count: 1 patents | ** Count: 1 patents | ||
| Line 56: | Line 56: | ||
* [[:Category:CPC_B60R2011/0005|B60R2011/0005]] | * [[:Category:CPC_B60R2011/0005|B60R2011/0005]] | ||
** Count: 1 patents | ** Count: 1 patents | ||
| − | ** Example: [[:20240046409. OBJECT DETECTION USING PLANAR HOMOGRAPHY AND SELF-SUPERVISED SCENE STRUCTURE UNDERSTANDING|20240046409. OBJECT DETECTION USING PLANAR HOMOGRAPHY AND SELF-SUPERVISED SCENE STRUCTURE UNDERSTANDING]] | + | ** Example: [[:20240046409. OBJECT DETECTION USING PLANAR HOMOGRAPHY AND SELF-SUPERVISED SCENE STRUCTURE UNDERSTANDING simplified abstract (NVIDIA CORPORATION)|20240046409. OBJECT DETECTION USING PLANAR HOMOGRAPHY AND SELF-SUPERVISED SCENE STRUCTURE UNDERSTANDING simplified abstract (NVIDIA CORPORATION)]] |
* [[:Category:CPC_G06V30/1902|G06V30/1902]] | * [[:Category:CPC_G06V30/1902|G06V30/1902]] | ||
** Count: 1 patents | ** Count: 1 patents | ||
Revision as of 17:43, 11 July 2024
Contents
NVIDIA Patent Filing Activity
2024
Top 10 Technology Areas
- G06T2207/20084
- Count: 37 patents
- Example: 20240104698. NEURAL NETWORK-BASED PERTURBATION REMOVAL simplified abstract (NVIDIA CORPORATION)
- G06N3/08
- Count: 35 patents
- Example: 20240119267. GENERATING NEURAL NETWORKS simplified abstract (NVIDIA CORPORATION)
- G06V10/82
- G06T2207/20081
- Count: 30 patents
- Example: 20240020863. OPTICAL CHARACTER DETECTION AND RECOGNITION simplified abstract (NVIDIA CORPORATION)
- G06T1/20
- G06T15/06
- Count: 22 patents
- Example: 20240095996. EFFICIENCY OF RAY-BOX TESTS simplified abstract (NVIDIA CORPORATION)
- G06F9/544
- G06T2207/10024
- G06T1/60
- Count: 15 patents
- Example: 20240104790. OPTIMIZING GRID-BASED COMPUTE GRAPHS simplified abstract (NVIDIA CORPORATION)
- G06T7/70
Emerging Technology Areas
- H05K7/20909
- H05K7/209
- Count: 1 patents
- Example: No example available
- H05K7/20154
- Count: 1 patents
- Example: No example available
- H05K1/0209
- Count: 1 patents
- Example: No example available
- G06F21/31
- G06V40/10
- Count: 1 patents
- Example: No example available
- B60R2011/0005
- G06V30/1902
- Count: 1 patents
- Example: No example available
- H04N23/54
- Count: 1 patents
- Example: No example available
- G06F18/251
- Count: 1 patents
- Example: No example available
Top Inventors
Patent Categories
Geographical Distribution of Inventors
Geographical Distribution of US Inventors
