Difference between revisions of "NVIDIA Patent Application Trends in 2024"
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[[File:Nvidia Top Technology Areas 2024 - Up to 11 July 2024.png|border|800px|Nvidia Top Technology Areas 2024 - Up to 11 July 2024]] | [[File:Nvidia Top Technology Areas 2024 - Up to 11 July 2024.png|border|800px|Nvidia Top Technology Areas 2024 - Up to 11 July 2024]] | ||
| − | + | * [[:Category:CPC_G06T15_06|G06T15/06]] (Ray tracing) | |
| − | + | ** Count: 18 patents | |
| − | * [[:Category:CPC_G06T15_06|G06T15/06]]: 18 patents | ||
** Example: EARLY RELEASE OF RESOURCES IN RAY TRACING HARDWARE | ** Example: EARLY RELEASE OF RESOURCES IN RAY TRACING HARDWARE | ||
| − | * [[:Category:CPC_G06F9_544|G06F9/544]]: 16 patents | + | * [[:Category:CPC_G06F9_544|G06F9/544]] (API errors) |
| + | ** Count: 16 patents | ||
** Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS | ** Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS | ||
| − | * [[:Category:CPC_G06N3_08|G06N3/08]]: 11 patents | + | * [[:Category:CPC_G06N3_08|G06N3/08]] (Computational models) |
| + | ** Count: 11 patents | ||
** Example: DISTANCE TO OBSTACLE DETECTION IN AUTONOMOUS MACHINE APPLICATIONS | ** Example: DISTANCE TO OBSTACLE DETECTION IN AUTONOMOUS MACHINE APPLICATIONS | ||
| − | * [[:Category:CPC_G06T1_20|G06T1/20]]: 7 patents | + | * [[:Category:CPC_G06T1_20|G06T1/20]] (Sensor data) |
| + | ** Count: 7 patents | ||
** Example: FRACTIONALIZED TRANSFERS OF SENSOR DATA FOR STREAMING AND LATENCY-SENSITIVE APPLICATIONS | ** Example: FRACTIONALIZED TRANSFERS OF SENSOR DATA FOR STREAMING AND LATENCY-SENSITIVE APPLICATIONS | ||
| − | * [[:Category:CPC_G06T5_002|G06T5/002]]: 6 patents | + | * [[:Category:CPC_G06T5_002|G06T5/002]] (Image perturbation) |
| + | ** Count: 6 patents | ||
** Example: NEURAL NETWORK-BASED PERTURBATION REMOVAL | ** Example: NEURAL NETWORK-BASED PERTURBATION REMOVAL | ||
| − | * [[:Category:CPC_G06T17_20|G06T17/20]]: 6 patents | + | * [[:Category:CPC_G06T17_20|G06T17/20]] (Mesh topology) |
| + | ** Count: 6 patents | ||
** Example: MESH TOPOLOGY GENERATION USING PARALLEL PROCESSING | ** Example: MESH TOPOLOGY GENERATION USING PARALLEL PROCESSING | ||
| − | * [[:Category:CPC_G06F9_547|G06F9/547]]: 6 patents | + | * [[:Category:CPC_G06F9_547|G06F9/547]] (API controllers) |
| + | ** Count: 6 patents | ||
** Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE A CONTROLLER TO A DEVICE IN AN ACCESS NETWORK | ** Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE A CONTROLLER TO A DEVICE IN AN ACCESS NETWORK | ||
| − | * [[:Category:CPC_G06F9_4881|G06F9/4881]]: 6 patents | + | * [[:Category:CPC_G06F9_4881|G06F9/4881]] (Graph modification) |
| + | ** Count: 6 patents | ||
** Example: GRAPH MODIFICATION | ** Example: GRAPH MODIFICATION | ||
| − | * [[:Category:CPC_G06T1_60|G06T1/60]]: 6 patents | + | * [[:Category:CPC_G06T1_60|G06T1/60]] (Memory transactions) |
| + | ** Count: 6 patents | ||
** Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE MEMORY TRANSACTION | ** Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE MEMORY TRANSACTION | ||
| − | * [[:Category:CPC_G06N3_084|G06N3/084]]: 5 patents | + | * [[:Category:CPC_G06N3_084|G06N3/084]] (AI hardware) |
| + | ** Count: 5 patents | ||
** Example: ANNOTATING HIGH DEFINITION MAP DATA WITH SEMANTIC LABELS | ** Example: ANNOTATING HIGH DEFINITION MAP DATA WITH SEMANTIC LABELS | ||
== Emerging Technology Areas == | == Emerging Technology Areas == | ||
[[File:Nvidia Top Emerging Technology Areas 2024 - Up to 11 July 2024.png|border|800px|Nvidia Top Emerging Technology Areas 2024 - Up to 11 July 2024]] | [[File:Nvidia Top Emerging Technology Areas 2024 - Up to 11 July 2024.png|border|800px|Nvidia Top Emerging Technology Areas 2024 - Up to 11 July 2024]] | ||
| − | * [[:Category:CPC_G01C21_26|G01C21/26]]: 1 patents | + | |
| + | * [[:Category:CPC_G01C21_26|G01C21/26]] (Pose detection) | ||
| + | ** Count: 1 patents | ||
** Example: INTERSECTION POSE DETECTION IN AUTONOMOUS MACHINE APPLICATIONS | ** Example: INTERSECTION POSE DETECTION IN AUTONOMOUS MACHINE APPLICATIONS | ||
| − | * [[:Category:CPC_G06F3_0613|G06F3/0613]]: 1 patents | + | * [[:Category:CPC_G06F3_0613|G06F3/0613]] (Latency monitoring) |
| + | ** Count: 1 patents | ||
** Example: HARDWARE LATENCY MONITORING FOR MEMORY DEVICE INPUT/OUTPUT REQUESTS | ** Example: HARDWARE LATENCY MONITORING FOR MEMORY DEVICE INPUT/OUTPUT REQUESTS | ||
| − | * [[:Category:CPC_G06F9_3824|G06F9/3824]]: 1 patents | + | * [[:Category:CPC_G06F9_3824|G06F9/3824]] (Workload assignment) |
| + | ** Count: 1 patents | ||
** Example: WORKLOAD ASSIGNMENT TECHNIQUE | ** Example: WORKLOAD ASSIGNMENT TECHNIQUE | ||
| − | * [[:Category:CPC_G06F9_5038|G06F9/5038]]: 1 patents | + | * [[:Category:CPC_G06F9_5038|G06F9/5038]] (Dynamic inferencing) |
| + | ** Count: 1 patents | ||
** Example: TECHNIQUES FOR BALANCING DYNAMIC INFERENCING BY MACHINE LEARNING MODELS | ** Example: TECHNIQUES FOR BALANCING DYNAMIC INFERENCING BY MACHINE LEARNING MODELS | ||
| − | * [[:Category:CPC_G06F11_3409|G06F11/3409]]: 1 patents | + | * [[:Category:CPC_G06F11_3409|G06F11/3409]] (Application execution) |
| + | ** Count: 1 patents | ||
** Example: APPLICATION EXECUTION ALLOCATION USING MACHINE LEARNING | ** Example: APPLICATION EXECUTION ALLOCATION USING MACHINE LEARNING | ||
| − | * [[:Category:CPC_G06F11_3644|G06F11/3644]]: 1 patents | + | * [[:Category:CPC_G06F11_3644|G06F11/3644]] (Error testing) |
| + | ** Count: 1 patents | ||
** Example: SOFTWARE PROGRAM ERROR TESTING FOR AUTONOMOUS SYSTEMS AND APPLICATIONS | ** Example: SOFTWARE PROGRAM ERROR TESTING FOR AUTONOMOUS SYSTEMS AND APPLICATIONS | ||
| − | * [[:Category:CPC_G06T7_30|G06T7/30]]: 1 patents | + | * [[:Category:CPC_G06T7_30|G06T7/30]] (Image processing) |
| + | ** Count: 1 patents | ||
** Example: IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION | ** Example: IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION | ||
| − | * [[:Category:CPC_G06V10_56|G06V10/56]]: 1 patents | + | * [[:Category:CPC_G06V10_56|G06V10/56]] (Artifact removal) |
| + | ** Count: 1 patents | ||
** Example: REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS | ** Example: REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS | ||
| − | * [[:Category:CPC_G06V20_54|G06V20/54]]: 1 patents | + | * [[:Category:CPC_G06V20_54|G06V20/54]] (Object detection) |
| + | ** Count: 1 patents | ||
** Example: SCENARIO RECREATION THROUGH OBJECT DETECTION AND 3D VISUALIZATION IN A MULTI-SENSOR ENVIRONMENT | ** Example: SCENARIO RECREATION THROUGH OBJECT DETECTION AND 3D VISUALIZATION IN A MULTI-SENSOR ENVIRONMENT | ||
| − | * [[:Category:CPC_H03K19_1776|H03K19/1776]]: 1 patents | + | * [[:Category:CPC_H03K19_1776|H03K19/1776]] (Unified receiver) |
| + | ** Count: 1 patents | ||
** Example: DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM | ** Example: DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM | ||
Revision as of 08:56, 11 July 2024
Contents
NVIDIA Patent Filing Activity
2024
Top 10 Technology Areas
- G06T15/06 (Ray tracing)
- Count: 18 patents
- Example: EARLY RELEASE OF RESOURCES IN RAY TRACING HARDWARE
- G06F9/544 (API errors)
- Count: 16 patents
- Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE STORAGE OF ACCELERATOR ERRORS
- G06N3/08 (Computational models)
- Count: 11 patents
- Example: DISTANCE TO OBSTACLE DETECTION IN AUTONOMOUS MACHINE APPLICATIONS
- G06T1/20 (Sensor data)
- Count: 7 patents
- Example: FRACTIONALIZED TRANSFERS OF SENSOR DATA FOR STREAMING AND LATENCY-SENSITIVE APPLICATIONS
- G06T5/002 (Image perturbation)
- Count: 6 patents
- Example: NEURAL NETWORK-BASED PERTURBATION REMOVAL
- G06T17/20 (Mesh topology)
- Count: 6 patents
- Example: MESH TOPOLOGY GENERATION USING PARALLEL PROCESSING
- G06F9/547 (API controllers)
- Count: 6 patents
- Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE A CONTROLLER TO A DEVICE IN AN ACCESS NETWORK
- G06F9/4881 (Graph modification)
- Count: 6 patents
- Example: GRAPH MODIFICATION
- G06T1/60 (Memory transactions)
- Count: 6 patents
- Example: APPLICATION PROGRAMMING INTERFACE TO INDICATE MEMORY TRANSACTION
- G06N3/084 (AI hardware)
- Count: 5 patents
- Example: ANNOTATING HIGH DEFINITION MAP DATA WITH SEMANTIC LABELS
Emerging Technology Areas
- G01C21/26 (Pose detection)
- Count: 1 patents
- Example: INTERSECTION POSE DETECTION IN AUTONOMOUS MACHINE APPLICATIONS
- G06F3/0613 (Latency monitoring)
- Count: 1 patents
- Example: HARDWARE LATENCY MONITORING FOR MEMORY DEVICE INPUT/OUTPUT REQUESTS
- G06F9/3824 (Workload assignment)
- Count: 1 patents
- Example: WORKLOAD ASSIGNMENT TECHNIQUE
- G06F9/5038 (Dynamic inferencing)
- Count: 1 patents
- Example: TECHNIQUES FOR BALANCING DYNAMIC INFERENCING BY MACHINE LEARNING MODELS
- G06F11/3409 (Application execution)
- Count: 1 patents
- Example: APPLICATION EXECUTION ALLOCATION USING MACHINE LEARNING
- G06F11/3644 (Error testing)
- Count: 1 patents
- Example: SOFTWARE PROGRAM ERROR TESTING FOR AUTONOMOUS SYSTEMS AND APPLICATIONS
- G06T7/30 (Image processing)
- Count: 1 patents
- Example: IMAGE PROCESSING USING NEURAL NETWORKS, WITH IMAGE REGISTRATION
- G06V10/56 (Artifact removal)
- Count: 1 patents
- Example: REMOVING ARTIFACTS USING DITHERING COMPENSATION IN IMAGE STREAMING SYSTEMS AND APPLICATIONS
- G06V20/54 (Object detection)
- Count: 1 patents
- Example: SCENARIO RECREATION THROUGH OBJECT DETECTION AND 3D VISUALIZATION IN A MULTI-SENSOR ENVIRONMENT
- H03K19/1776 (Unified receiver)
- Count: 1 patents
- Example: DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM
