Difference between revisions of "Category:Vydhyanathan Kalyanasundharam of Santa Clara CA (US)"

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(Updating Category:Vydhyanathan_Kalyanasundharam_of_Santa_Clara_CA_(US))
 
(Updating Category:Vydhyanathan_Kalyanasundharam_of_Santa_Clara_CA_(US))
 
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=== Executive Summary ===
 
=== Executive Summary ===
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Vydhyanathan Kalyanasundharam of Santa Clara CA (US) is an inventor who has filed 6 patents. Their primary areas of innovation include Cache consistency protocols (2 patents), {by allocating resources to storage systems} (1 patents), {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (1 patents), and they have worked with companies such as Advanced Micro Devices, Inc. (5 patents), ADVANCED MICRO DEVICES, INC. (1 patents). Their most frequent collaborators include [[Category:Ganesh Balakrishnan of Austin TX (US)|Ganesh Balakrishnan of Austin TX (US)]] (3 collaborations), [[Category:Amit Apte of Austin TX (US)|Amit Apte of Austin TX (US)]] (2 collaborations), [[Category:Ann Ling of Santa Clara CA (US)|Ann Ling of Santa Clara CA (US)]] (2 collaborations).
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Vydhyanathan Kalyanasundharam of Santa Clara CA (US) is an inventor who has filed 6 patents. Their primary areas of innovation include No explanation available (2 patents), No explanation available (1 patents), No explanation available (1 patents), and they have worked with companies such as Advanced Micro Devices, Inc. (5 patents), ADVANCED MICRO DEVICES, INC. (1 patents). Their most frequent collaborators include [[Category:Ganesh Balakrishnan of Austin TX (US)|Ganesh Balakrishnan of Austin TX (US)]] (3 collaborations), [[Category:Amit Apte of Austin TX (US)|Amit Apte of Austin TX (US)]] (2 collaborations), [[Category:Ann Ling of Santa Clara CA (US)|Ann Ling of Santa Clara CA (US)]] (2 collaborations).
  
 
=== Patent Filing Activity ===
 
=== Patent Filing Activity ===
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==== List of Technology Areas ====
 
==== List of Technology Areas ====
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* [[:Category:CPC_G06F12/0815|G06F12/0815]] (Cache consistency protocols): 2 patents
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* [[:Category:CPC_G06F12/0815|G06F12/0815]] (No explanation available): 2 patents
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* [[:Category:CPC_G06F3/0631|G06F3/0631]] ({by allocating resources to storage systems}): 1 patents
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* [[:Category:CPC_G06F3/0631|G06F3/0631]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F3/0679|G06F3/0679]] ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 1 patents
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* [[:Category:CPC_G06F3/0679|G06F3/0679]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F3/0604|G06F3/0604]] (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
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* [[:Category:CPC_G06F3/0604|G06F3/0604]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F9/5016|G06F9/5016]] (Allocation of resources, e.g. of the central processing unit [CPU]): 1 patents
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* [[:Category:CPC_G06F9/5016|G06F9/5016]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F9/544|G06F9/544]] (Interprogram communication): 1 patents
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* [[:Category:CPC_G06F9/544|G06F9/544]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F12/0802|G06F12/0802]] (Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches): 1 patents
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* [[:Category:CPC_G06F12/0802|G06F12/0802]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F2212/1024|G06F2212/1024]] (ELECTRIC DIGITAL DATA PROCESSING  (computer systems based on specific computational models): 1 patents
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* [[:Category:CPC_G06F2212/1024|G06F2212/1024]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F12/0897|G06F12/0897]] (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
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* [[:Category:CPC_G06F12/0897|G06F12/0897]] (No explanation available): 1 patents
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* [[:Category:CPC_G06F2212/1016|G06F2212/1016]] (ELECTRIC DIGITAL DATA PROCESSING  (computer systems based on specific computational models): 1 patents
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* [[:Category:CPC_G06F2212/1016|G06F2212/1016]] (No explanation available): 1 patents
  
 
=== Companies ===
 
=== Companies ===

Latest revision as of 08:33, 16 July 2024

Vydhyanathan Kalyanasundharam of Santa Clara CA (US)

Executive Summary

Vydhyanathan Kalyanasundharam of Santa Clara CA (US) is an inventor who has filed 6 patents. Their primary areas of innovation include No explanation available (2 patents), No explanation available (1 patents), No explanation available (1 patents), and they have worked with companies such as Advanced Micro Devices, Inc. (5 patents), ADVANCED MICRO DEVICES, INC. (1 patents). Their most frequent collaborators include (3 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

Vydhyanathan Kalyanasundharam of Santa Clara CA (US) Monthly Patent Applications.png

Technology Areas

Vydhyanathan Kalyanasundharam of Santa Clara CA (US) Top Technology Areas.png

List of Technology Areas

Companies

Vydhyanathan Kalyanasundharam of Santa Clara CA (US) Top Companies.png

List of Companies

  • Advanced Micro Devices, Inc.: 5 patents
  • ADVANCED MICRO DEVICES, INC.: 1 patents

Collaborators

Subcategories

This category has only the following subcategory.

V

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