View source for US Patent Application 18446755. MOBILITY ENHANCEMENT BY SOURCE AND DRAIN STRESS LAYER OR IMPLANTATION IN THIN FILM TRANSISTORS simplified abstract

=MOBILITY ENHANCEMENT BY SOURCE AND DRAIN STRESS LAYER OR IMPLANTATION IN THIN FILM TRANSISTORS=


==Organization Name==

[[:Category:Taiwan Semiconductor Manufacturing Company Limited|Taiwan Semiconductor Manufacturing Company Limited]]


[[Category:Taiwan Semiconductor Manufacturing Company Limited]]

==Inventor(s)==

[[:Category:Hui-Hsien Wei of Taoyuan City (TW)|Hui-Hsien Wei of Taoyuan City (TW)]][[Category:Hui-Hsien Wei of Taoyuan City (TW)]]

[[:Category:Yen-Chung Ho of Hsinchu (TW)|Yen-Chung Ho of Hsinchu (TW)]][[Category:Yen-Chung Ho of Hsinchu (TW)]]

[[:Category:Chia-Jung Yu of Hsinchu (TW)|Chia-Jung Yu of Hsinchu (TW)]][[Category:Chia-Jung Yu of Hsinchu (TW)]]

[[:Category:Yong-Jie Wu of Hsinchu (TW)|Yong-Jie Wu of Hsinchu (TW)]][[Category:Yong-Jie Wu of Hsinchu (TW)]]

[[:Category:Pin-Cheng Hsu of Zhubei City (TW)|Pin-Cheng Hsu of Zhubei City (TW)]][[Category:Pin-Cheng Hsu of Zhubei City (TW)]]

==MOBILITY ENHANCEMENT BY SOURCE AND DRAIN STRESS LAYER OR IMPLANTATION IN THIN FILM TRANSISTORS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18446755 titled 'MOBILITY ENHANCEMENT BY SOURCE AND DRAIN STRESS LAYER OR IMPLANTATION IN THIN FILM TRANSISTORS

==Simplified Explanation==

- The patent application describes a method for enhancing the mobility of charge carriers in a semiconducting material layer.
- A planar insulating spacer layer is formed over a substrate.
- A combination of a semiconducting material layer, a thin film transistor (TFT) gate dielectric layer, and a gate electrode is formed over the planar insulating spacer layer.
- A dielectric matrix layer is formed above the previous layers.
- Source-side and drain-side via cavities are formed through the dielectric matrix layer over the end portions of the semiconducting material layer.
- By changing the lattice constant of the end portions of the semiconducting material layer, mechanical stress is generated between them.
- This mechanical stress enhances the mobility of charge carriers in the channel portion of the semiconducting material layer.


==Original Abstract Submitted==

A planar insulating spacer layer can be formed over a substrate, and a combination of a semiconducting material layer, a thin film transistor (TFT) gate dielectric layer, and a gate electrode can be formed over the planar insulating spacer layer. A dielectric matrix layer is formed thereabove. A source-side via cavity and a drain-side via cavity can be formed through the dielectric matrix layer over end portions of the semiconducting material layer. Mechanical stress can be generated between the end portions of the semiconducting material layer by changing a lattice constant of end portions of the semiconducting material layer. The mechanical stress can enhance the mobility of charge carriers in a channel portion of the semiconducting material layer.



[[Category:H10B53/30]]
[[Category:H01L29/78]]
[[Category:H01L29/786]]
[[Category:H01L29/417]]