View source for US Patent Application 18157035. LATCH-BASED STORAGE CIRCUITS HAVING EFFICIENT INTEGRATED CIRCUIT LAYOUTS simplified abstract

=LATCH-BASED STORAGE CIRCUITS HAVING EFFICIENT INTEGRATED CIRCUIT LAYOUTS=


==Organization Name==

[[Samsung Electronics Co., Ltd.]]


==Inventor(s)==

[[Kijun Lee of Suwon-si (KR)]]


[[Youngmin Kang of Gwangju (KR)]]


[[Ikjoon Chang of Yongin-si (KR)]]


[[Kyomin Sohn of Suwon-si (KR)]]


==LATCH-BASED STORAGE CIRCUITS HAVING EFFICIENT INTEGRATED CIRCUIT LAYOUTS - A simplified explanation of the abstract==


*This abstract for appeared for US patent application  number 18157035 Titled 'LATCH-BASED STORAGE CIRCUITS HAVING EFFICIENT INTEGRATED CIRCUIT LAYOUTS'

==Simplified Explanation==

The abstract describes a storage circuit that uses a multi-stage latch circuit to store data. The latch circuit consists of four pairs of transistors, each pair connected to a storage node. An access circuit is included, which has different types of transistors that are connected to the storage nodes. These transistors allow for writing and reading of data in the storage nodes. A control circuit is also present to manage the access circuit during the writing and reading processes.


==Original Abstract Submitted==

A storage circuit includes a multi-stage latch circuit having first to fourth transistor pairs therein, which respectively include a pull-up transistor and a pull-down transistor connected in series through a corresponding one of first to fourth storage nodes. An access circuit is provided, which has a plurality of access transistors of different conductivity type therein. The access transistors are electrically coupled to at least two of the first to fourth storage nodes and configured to enable writing of data bits into at least some of the first to fourth storage nodes, and reading of data bits from at least some of the first to fourth storage nodes. A control circuit is provided, which controls the access circuit during the writing and reading.