View source for US Patent Application 18103542. DISPLAY DEVICE simplified abstract

=DISPLAY DEVICE=


==Organization Name==

[[:Category:Samsung Display Co., LTD.|Samsung Display Co., LTD.]]


[[Category:Samsung Display Co., LTD.]]==Inventor(s)==

[[Category:[[:Category:Soo Yeon Kim of Yongin-si (KR)|Soo Yeon Kim of Yongin-si (KR)]]]]

[[Category:[[:Category:Tae Gon Im of Yongin-si (KR)|Tae Gon Im of Yongin-si (KR)]]]]

[[Category:[[:Category:Jong Jae Lee of Yongin-si (KR)|Jong Jae Lee of Yongin-si (KR)]]]]

==DISPLAY DEVICE - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18103542 titled 'DISPLAY DEVICE

==Simplified Explanation==

The patent application describes a display device that includes multiple pixels arranged in rows and connected to gate lines and reset lines.
* The display device includes pixels connected to first and second gate lines in the first row, a pixel connected to the second gate line and a reset line in the second row, and a pixel connected to third and fourth gate lines in the third row.
* A gate driver supplies gate signals and a reset signal to the gate lines and reset line respectively.
* During the active period, the gate driver supplies the reset signal and the third gate signal simultaneously.
* During the rest period, the gate driver supplies a high-level reset signal and a low-level third gate signal.


==Original Abstract Submitted==

A display device includes a pixel electrically connected to a first gate line and a second gate line and disposed in a first row, a pixel electrically connected to the second gate line and a reset line and disposed in a second row after the first row, a pixel electrically connected to a third gate line and a fourth gate line and disposed in a third row after the second row, and a gate driver supplying first to fourth gate signals to the first to fourth gate lines and supplying a reset signal to the reset line. The gate driver supplies the reset signal and the third gate signal of a same timing during an active period, and supplies the reset signal having a high level and the third gate signal having a low level during a rest period.



[[Category:G09G3/32]]
[[Category:G09G3/3266]]