View source for Micron technology, inc. (20240203508). SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENABLE SUSPEND COMMANDS simplified abstract

=SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENABLE SUSPEND COMMANDS=


==Organization Name==

[[:Category:micron technology, inc.|micron technology, inc.]]


[[Category:micron technology, inc.]]

==Inventor(s)==

[[:Category:Chulbum Kim of San Jose CA (US)|Chulbum Kim of San Jose CA (US)]][[Category:Chulbum Kim of San Jose CA (US)]]

[[:Category:Brian Kwon of Fremont CA (US)|Brian Kwon of Fremont CA (US)]][[Category:Brian Kwon of Fremont CA (US)]]

[[:Category:Erwin E. Yu of San Jose CA (US)|Erwin E. Yu of San Jose CA (US)]][[Category:Erwin E. Yu of San Jose CA (US)]]

[[:Category:Kitae Park of Cupertino CA (US)|Kitae Park of Cupertino CA (US)]][[Category:Kitae Park of Cupertino CA (US)]]

[[:Category:Taehyun Kim of San Jose CA (US)|Taehyun Kim of San Jose CA (US)]][[Category:Taehyun Kim of San Jose CA (US)]]

==SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENABLE SUSPEND COMMANDS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 20240203508 titled 'SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENABLE SUSPEND COMMANDS

The memory device described in the abstract includes a memory array with memory cells and control logic that manages the operations of the memory array.

* The control logic initiates an erase pulse during a true erase sub-operation to erase one or more sub-blocks of the memory array.
* It keeps track of suspend commands received from a processing device, even when memory cells are being erased.
* In response to each suspend command, the control logic suspends the true erase sub-operation to allow for non-erase memory operations.
* When a threshold number of suspend commands is reached, the control logic alerts the processing device to stop sending suspend commands.

Potential Applications:
- This technology could be used in various memory devices such as solid-state drives, flash memory, and other storage devices.
- It can improve the efficiency and reliability of memory operations in electronic devices.

Problems Solved:
- Addresses the need for efficient management of memory operations during erase sub-operations.
- Ensures that memory operations can be suspended and resumed effectively without compromising data integrity.

Benefits:
- Enhances the performance and reliability of memory devices.
- Allows for better control and management of memory operations during erase processes.

Commercial Applications:
Title: Advanced Memory Device Control Technology for Enhanced Data Management
This technology can be applied in the development of high-performance storage devices for consumer electronics, data centers, and other computing systems. It can improve data storage efficiency and enhance the overall performance of memory devices in various commercial applications.

Questions about Memory Device Control Technology:
1. How does the control logic handle suspend commands during memory erase operations?
The control logic suspends the true erase sub-operation in response to each suspend command to allow for non-erase memory operations.
2. What are the potential benefits of using this memory device control technology in electronic devices?
The technology can enhance the performance and reliability of memory devices, improving data management and overall efficiency.


==Original Abstract Submitted==

a memory device includes a memory array comprising memory cells and control logic operatively coupled with the memory array. the control logic causes, as part of a true erase sub-operation, an erase pulse to be applied to one or more sub-blocks of the memory array. the control logic tracks a number of suspend commands received from a processing device, including suspend commands received while memory cells of the one or more sub-blocks are being erased. the control logic causes, in response to receiving each suspend command, the true erase sub-operation to be suspended to enable performing a non-erase memory operation. the control logic, in response to the number of suspend commands satisfying a threshold criterion, alerts the processing device to terminate sending suspend commands.



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