View source for Apple inc. (20240275369). DYNAMIC CONFIGURATION OF SPUR CANCELLATION simplified abstract

=DYNAMIC CONFIGURATION OF SPUR CANCELLATION=


==Organization Name==

[[:Category:apple inc.|apple inc.]]


[[Category:apple inc.]]

==Inventor(s)==

[[:Category:Helena Deirdre O'shea of San Jose CA (US)|Helena Deirdre O'shea of San Jose CA (US)]][[Category:Helena Deirdre O'shea of San Jose CA (US)]]

[[:Category:Dmitry Cherniavsky of San Jose CA (US)|Dmitry Cherniavsky of San Jose CA (US)]][[Category:Dmitry Cherniavsky of San Jose CA (US)]]

[[:Category:Tim Schoenauer of Feldkirchen (DE)|Tim Schoenauer of Feldkirchen (DE)]][[Category:Tim Schoenauer of Feldkirchen (DE)]]

[[:Category:Ali Moaz of Nuernberg (DE)|Ali Moaz of Nuernberg (DE)]][[Category:Ali Moaz of Nuernberg (DE)]]

[[:Category:Rahmi Hezar of San Francisco CA (US)|Rahmi Hezar of San Francisco CA (US)]][[Category:Rahmi Hezar of San Francisco CA (US)]]

[[:Category:Ram Kanumalli of Linz (AT)|Ram Kanumalli of Linz (AT)]][[Category:Ram Kanumalli of Linz (AT)]]

==DYNAMIC CONFIGURATION OF SPUR CANCELLATION - A simplified explanation of the abstract==


This abstract first appeared for US patent application 20240275369 titled 'DYNAMIC CONFIGURATION OF SPUR CANCELLATION

'''Simplified Explanation:'''
The patent application relates to updating spur cancellation at a victim integrated circuit based on dynamic changes in the operating frequencies of an aggressor integrated circuit. The victim IC adjusts clock signals to cancel out interference caused by changes in the aggressor IC's frequencies.

* **Key Features and Innovation:**
    - Victim IC dynamically updates relationships between local clock frequencies to counteract changes in aggressor IC operating frequencies.
    - Victim IC generates a spur cancellation parameter based on updated frequency relationships and configures a cancellation circuit accordingly.

* **Potential Applications:**
    - Integrated circuits in electronic devices where interference from changing frequencies is a concern.
    - Communication systems where maintaining signal integrity is crucial.

* **Problems Solved:**
    - Addressing interference issues caused by dynamic changes in operating frequencies of aggressor ICs.
    - Ensuring effective spur cancellation despite frequency deviations.

* **Benefits:**
    - Improved signal quality in electronic devices.
    - Enhanced performance of communication systems.

* **Commercial Applications:**
    - Title: "Dynamic Spur Cancellation Technology for Enhanced Signal Integrity"
    - Potential commercial uses in smartphones, IoT devices, and networking equipment.
    - Market implications include improved reliability and performance of electronic devices.

* **Prior Art:**
    - Readers can explore prior research on dynamic frequency adjustments in integrated circuits and signal processing technologies.

* **Frequently Updated Research:**
    - Stay informed about advancements in integrated circuit design and signal processing techniques for improved interference mitigation.

'''Questions about Dynamic Spur Cancellation Technology:'''

1. How does the victim IC determine the update time for adjusting clock signals?
    - The update time is predetermined and shared with the victim IC by the aggressor IC.

2. What are the implications of not updating the relationships between local clock frequencies in the victim IC?
    - Without updating these relationships, effective spur cancellation may not be achieved, leading to potential signal degradation.


==Original Abstract Submitted==

embodiments relate to updating spur cancellation at a victim integrated circuit (ic) in accordance with dynamic changes in the operating frequencies of an aggressor ic. the aggressor ic changes its operating frequencies at an update time that is determined in advance. the update time and the changes to the operating frequencies are shared with the victim ic. the victim ic dynamically updates the relationships between frequencies of local clock signals for the victim ic and the aggressor ic. the victim ic generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor ic, and configures a spur cancellation circuit. in this way, the victim ic may perform effective spur cancellation despite changes in the operating frequencies of the aggressor ic and deviation of the local clock frequencies.



[[Category:H03K5/1252]]
[[Category:G06F1/08]]
[[Category:G06F13/40]]
[[Category:CPC_H03K5/1252]]