View source for 20250167101. Soi S (SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC)

= SOI SUBSTRATE AND RELATED METHODS =

'''Abstract''':
implementations of a method of making a silicon-on-insulator (soi) die may include forming a plurality of grooves in a second side of a silicon substrate, depositing an insulative layer directly to the second side of the silicon substrate, the insulative layer filling the plurality of grooves, the silicon substrate comprising a first side opposite the second side, and singulating the silicon substrate through the plurality of grooves into a plurality of soi die. the insulative layer may be coupled to silicon only through the second side of the silicon substrate.

'''Inventor(s)''': [[:Category:Michael J. SEDDON of Gilbert AZ US|Michael J. SEDDON]], [[:Category:Mark GRISWOLD of Gilbert AZ US|Mark GRISWOLD]]

'''CPC Classification''': [[:Category:CPC_H01L23/5222|H01L23/5222]] ({Capacitive arrangements or effects of, or between wiring layers  (other capacitive arrangements )})


[[Category:Patent Applications]]
[[Category:SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC]]
[[Category:CPC_H01L23/5222]]
[[Category:Michael J. SEDDON of Gilbert AZ US]]
[[Category:Mark GRISWOLD of Gilbert AZ US]]

[https://wikipatents.org/index.php?search=20250167101+rejection&title=Special%3ASearch&wprov=acrw1_-1 Search for rejections for patent application number 20250167101]


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