View source for 18618181. ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME simplified abstract (Samsung Display Co., LTD.)

=ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME=


==Organization Name==

[[:Category:Samsung Display Co., LTD.|Samsung Display Co., LTD.]]


[[Category:Samsung Display Co., LTD.]]

==Inventor(s)==

[[:Category:Dae Geun Lee of Hwaseong-si (KR)|Dae Geun Lee of Hwaseong-si (KR)]][[Category:Dae Geun Lee of Hwaseong-si (KR)]]

==ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18618181 titled 'ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME

The abstract of the patent application describes an electronic device with an array substrate, a pad portion, and an integrated circuit with a bump portion. The pad portion includes two sub-pad units with inclined shapes symmetrically arranged on either side of an imaginary line, and is electrically connected to the bump portion.

* The electronic device includes an array substrate, a pad portion, and an integrated circuit with a bump portion.
* The pad portion consists of two sub-pad units, each with an inclined shape.
* The first and second pads are symmetrically arranged with respect to an imaginary line dividing the pad portion.
* The pad portion is electrically connected to the bump portion.

Potential Applications:
- This technology could be used in the manufacturing of electronic devices such as smartphones, tablets, and laptops.
- It could also be applied in the development of advanced semiconductor devices.

Problems Solved:
- This innovation addresses the need for efficient electrical connections in electronic devices.
- It provides a solution for optimizing space utilization on array substrates.

Benefits:
- Improved electrical connectivity in electronic devices.
- Enhanced space efficiency on array substrates.
- Potential for increased performance and reliability in electronic devices.

Commercial Applications:
Title: Advanced Electronic Device Manufacturing Technology
This technology could be utilized by electronics manufacturers to enhance the performance and reliability of their products. It could also lead to the development of more compact and efficient electronic devices, catering to the demands of the market for smaller and more powerful gadgets.

Questions about the technology:
1. How does the inclined shape of the pads contribute to the efficiency of electrical connections?
2. What are the potential cost savings associated with implementing this technology in electronic device manufacturing processes?


==Original Abstract Submitted==

An electronic device, including an array substrate, a pad portion disposed on the array substrate, and an integrated circuit disposed on the pad portion and comprising a bump portion. The pad portion includes a first sub-pad unit including a first pad having an inclined shape and a second sub-pad unit including a second pad having an inclined shape. The first pad and the second pad are symmetrically arranged with respect to an imaginary line that divides the pad portion. The pad portion is electrically connected with the bump portion.



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