View source for 18598907. FERROELECTRIC 3D MEMORY BLOCK UNIT (Tokyo Electron Limited)

=FERROELECTRIC 3D MEMORY BLOCK UNIT=


==Organization Name==

[[:Category:Tokyo Electron Limited|Tokyo Electron Limited]]


[[Category:Tokyo Electron Limited]]

==Inventor(s)==

[[:Category:Partha Mukhopadhyay of Oviedo FL US|Partha Mukhopadhyay of Oviedo FL US]][[Category:Partha Mukhopadhyay of Oviedo FL US]]

[[:Category:Henry Jim Fulford of Albany NY US|Henry Jim Fulford of Albany NY US]][[Category:Henry Jim Fulford of Albany NY US]]

[[:Category:Mark I. Gardner of Albany NY US|Mark I. Gardner of Albany NY US]][[Category:Mark I. Gardner of Albany NY US]]

==FERROELECTRIC 3D MEMORY BLOCK UNIT==


This abstract first appeared for US patent application 18598907 titled 'FERROELECTRIC 3D MEMORY BLOCK UNIT

==Original Abstract Submitted==

FeFET memory devices are provided. A semiconductor device includes a first metal structure of a first gate electrode. The semiconductor device includes a gate dielectric structure extending along a bottom surface of the first metal structure and surrounding a sidewall of the first metal structure. The semiconductor device includes a semiconductor-behaving structure extending along a bottom surface of the gate dielectric structure and surrounding a sidewall of the gate dielectric structure. The semiconductor device includes a ferroelectric structure surrounding a sidewall of the semiconductor-behaving structure. The semiconductor device includes a second gate electrode comprising a second metal structure in contact with the semiconductor-behaving structure.



[[Category:H10B51/30]]
[[Category:CPC_H10B51/30]]