View source for 18516499. SYSTEM AND METHOD OF VERIFYING SLANTED LAYOUT COMPONENTS simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

=SYSTEM AND METHOD OF VERIFYING SLANTED LAYOUT COMPONENTS=


==Organization Name==

[[:Category:Taiwan Semiconductor Manufacturing Company, Ltd.|Taiwan Semiconductor Manufacturing Company, Ltd.]]


[[Category:Taiwan Semiconductor Manufacturing Company, Ltd.]]

==Inventor(s)==

[[:Category:Yuan-Te Hou of Hsinchu City (TW)|Yuan-Te Hou of Hsinchu City (TW)]][[Category:Yuan-Te Hou of Hsinchu City (TW)]]

[[:Category:Min-Yuan Tsai of Hsinchu County (TW)|Min-Yuan Tsai of Hsinchu County (TW)]][[Category:Min-Yuan Tsai of Hsinchu County (TW)]]

==SYSTEM AND METHOD OF VERIFYING SLANTED LAYOUT COMPONENTS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18516499 titled 'SYSTEM AND METHOD OF VERIFYING SLANTED LAYOUT COMPONENTS

==Simplified Explanation==

The patent application relates to verifying the layout design of an integrated circuit with slanted layout components.

* Detection of slanted layout components with a side slanted from a base axis by an offset angle.
* Transformation of the location of a vertex of the slanted layout component to obtain the location of a rotated vertex of a rotated layout component.
* Performing layout verification on the rotated layout component with respect to the base axis.

== Potential Applications ==
* Semiconductor industry for integrated circuit design and manufacturing.
* Electronic design automation tools for layout verification processes.

== Problems Solved ==
* Ensuring accurate layout verification of integrated circuits with slanted components.
* Improving the efficiency of detecting and handling slanted layout components in integrated circuit designs.

== Benefits ==
* Enhanced accuracy in layout verification processes.
* Increased reliability of integrated circuit designs.
* Improved overall performance of electronic devices utilizing the integrated circuits.


==Original Abstract Submitted==

Disclosed herein are related to performing layout verification of a layout design of an integrated circuit having a slanted layout component. In one aspect, a slanted layout component having a side slanted from a base axis by an offset angle is detected. In one aspect, a first location of a vertex of the slanted layout component according to the offset angle is transformed to obtain a second location of a rotated vertex of a rotated layout component. In one aspect, layout verification is performed on the rotated layout component with respect to the base axis.



[[Category:G06F30/398]]
[[Category:G06F30/31]]
[[Category:G06F30/392]]