View source for 18514338. MOSFET GATE FORMATION simplified abstract (NEXPERIA B.V.)

=MOSFET GATE FORMATION=


==Organization Name==

[[:Category:NEXPERIA B.V.|NEXPERIA B.V.]]


[[Category:NEXPERIA B.V.]]

==Inventor(s)==

[[:Category:Epameinondas Efthymiou of Manchester (GB)|Epameinondas Efthymiou of Manchester (GB)]][[Category:Epameinondas Efthymiou of Manchester (GB)]]

[[:Category:Hungjin Kim of Shanghai (CN)|Hungjin Kim of Shanghai (CN)]][[Category:Hungjin Kim of Shanghai (CN)]]

[[:Category:Ian Cousins of Manchester (GB)|Ian Cousins of Manchester (GB)]][[Category:Ian Cousins of Manchester (GB)]]

[[:Category:Milan Madaras of Newport (GB)|Milan Madaras of Newport (GB)]][[Category:Milan Madaras of Newport (GB)]]

[[:Category:David Kent of Newport (GB)|David Kent of Newport (GB)]][[Category:David Kent of Newport (GB)]]

==MOSFET GATE FORMATION - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18514338 titled 'MOSFET GATE FORMATION

==Simplified Explanation==

The method described in the abstract involves forming a gate of a split-gate trench MOSFET in an epitaxial layer, utilizing various steps including providing trenches, depositing insulator material, etching, and forming gate polysilicon bars.

* Trenches are provided on either side of a source polysilicon rib in the epitaxial layer.
* Inner walls of the trenches are formed by a deposited insulator.
* Mask material is used to protect a portion of the insulator during etching.
* Gate polysilicon bars are formed in the trenches after removing the mask.

== Potential Applications ==
The technology described in this patent application could be applied in the manufacturing of advanced semiconductor devices, particularly in the field of power electronics and integrated circuits.

== Problems Solved ==
This method provides a way to efficiently form gates for split-gate trench MOSFETs, improving the performance and reliability of these devices. It also allows for precise control over the gate structure, leading to better overall device characteristics.

== Benefits ==
Some benefits of this technology include enhanced device performance, increased efficiency, and potentially lower production costs due to improved manufacturing processes.

== Potential Commercial Applications ==
The technology could find commercial applications in industries that require high-performance semiconductor devices, such as power electronics, automotive electronics, and telecommunications.

== Possible Prior Art ==
One possible prior art in this field could be the use of similar techniques for forming gates in semiconductor devices, such as trench MOSFETs. Previous patents or research papers may exist that describe related methods or structures.

=== Unanswered Questions ===

=== How does this method compare to existing techniques for forming gates in trench MOSFETs? ===
This article does not provide a direct comparison with other methods commonly used in the industry for forming gates in trench MOSFETs. It would be helpful to understand the advantages and disadvantages of this new method in relation to existing techniques.

=== What are the specific performance improvements that can be achieved by implementing this technology? ===
While the abstract mentions improved performance and reliability, it does not specify the exact metrics or characteristics that can be enhanced by using this method. Further details on the performance improvements would be beneficial for potential users or researchers looking to adopt this technology.


==Original Abstract Submitted==

A method of forming a gate of a split-gate trench MOSFET in an epitaxial layer is provided, the epitaxial layer includes a source polysilicon rib which extends perpendicularly to a plane of the layer; providing trenches on either side of an upper portion of the source polysilicon rib, with inner walls of the trenches formed by a deposited insulator, providing mask material which extends into the trench, providing photoresist on the epitaxial layer and using photolithography to pattern the photoresist, using the photoresist to etch the insulator, a portion of the insulator in contact with the source polysilicon is protected from etching by the mask, removing the mask and forming trenches on either side of the source polysilicon, each trench having an inner wall formed by the insulator which was protected from etching providing an insulator on the epitaxial layer, and providing a bar of gate polysilicon in each trench.



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