View source for 18375486. OFFLOADING FUNCTION STREAMS (INTEL CORPORATION)

=OFFLOADING FUNCTION STREAMS=


==Organization Name==

[[:Category:INTEL CORPORATION|INTEL CORPORATION]]


[[Category:INTEL CORPORATION]]

==Inventor(s)==

[[:Category:Robert Pawlowski of Beaverton OR US|Robert Pawlowski of Beaverton OR US]][[Category:Robert Pawlowski of Beaverton OR US]]

[[:Category:Vincent Cave of Hillsboro OR US|Vincent Cave of Hillsboro OR US]][[Category:Vincent Cave of Hillsboro OR US]]

[[:Category:Fabio Checconi of Fremont CA US|Fabio Checconi of Fremont CA US]][[Category:Fabio Checconi of Fremont CA US]]

[[:Category:Scott Cline of Portland OR US|Scott Cline of Portland OR US]][[Category:Scott Cline of Portland OR US]]

[[:Category:Shruti Sharma of Beaverton OR US|Shruti Sharma of Beaverton OR US]][[Category:Shruti Sharma of Beaverton OR US]]

==OFFLOADING FUNCTION STREAMS==


This abstract first appeared for US patent application 18375486 titled 'OFFLOADING FUNCTION STREAMS

==Original Abstract Submitted==

Techniques for offloading function streams are described. In some examples, a function is a sequence of instructions and a stream is a sequence of functions. In some examples, a co-processor is to handle functions and/or function streams provided by a main processor. In some examples, the co-processor includes a plurality of execution resources that at least include one or more of a direct memory access (DMA) engine, an atomic engine, and a collectives engine.



[[Category:G06F15/78]]
[[Category:CPC_G06F15/7839]]