View source for 18358587. MEMORY SYSTEM simplified abstract (SK hynix Inc.)

=MEMORY SYSTEM=


==Organization Name==

[[:Category:SK hynix Inc.|SK hynix Inc.]]


[[Category:SK hynix Inc.]]

==Inventor(s)==

[[:Category:Woongrae Kim of Gyeonggi-do (KR)|Woongrae Kim of Gyeonggi-do (KR)]][[Category:Woongrae Kim of Gyeonggi-do (KR)]]

==MEMORY SYSTEM - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18358587 titled 'MEMORY SYSTEM

==Simplified Explanation==

The patent application describes a memory system that includes two memory areas: a normal memory area for storing regular data and a security memory area for storing sensitive data. 

* The system includes a first row hammer detection circuit that samples and counts the number of rows activated in the normal memory area. This circuit identifies the first rows that need to be refreshed to prevent data corruption caused by row hammer attacks.
* Additionally, the system includes a second row hammer detection circuit that counts all the rows activated in the security memory area. This circuit identifies the second rows that need to be refreshed to ensure the security of the sensitive data.
* The purpose of these row hammer detection circuits is to prevent row hammer attacks, which exploit the vulnerability of DRAM cells to repeated access, causing bit flips and potentially compromising data integrity and security.

Potential applications of this technology:

* This memory system can be used in various computing devices, such as computers, servers, and mobile devices, to protect both regular and sensitive data from row hammer attacks.
* It can be particularly useful in systems that handle sensitive information, such as financial institutions, government agencies, and data centers.

Problems solved by this technology:

* Row hammer attacks can lead to data corruption and security breaches, compromising the integrity and confidentiality of stored information.
* This memory system addresses the vulnerability of DRAM cells to row hammer attacks by detecting and refreshing the rows that are susceptible to such attacks.

Benefits of this technology:

* By incorporating row hammer detection circuits, the memory system provides an additional layer of protection against row hammer attacks, enhancing data integrity and security.
* The system ensures that both regular and sensitive data are safeguarded from the potential consequences of row hammer attacks.
* It offers a more efficient and targeted approach to refreshing memory rows, reducing the overall system overhead and improving performance.


==Original Abstract Submitted==

A memory system includes: a normal memory area suitable for storing normal data; a security memory area suitable for storing security data; a first row hammer detection circuit suitable for sampling and counting a portion of rows that are activated in the normal memory area to select first rows that need to be refreshed; and a second row hammer detection circuit suitable for counting all rows that are activated in the security memory area to select second rows that need to be refreshed.



[[Category:G11C11/406]]
[[Category:G06F12/14]]
[[Category:G11C29/44]]
[[Category:G06F12/0811]]
[[Category:G11C29/42]]