View source for 18315311. INTERFACES BETWEEN HIGHER VOLTAGE AND LOWER VOLTAGE WAFERS AND RELATED APPARATUSES AND METHODS simplified abstract (Micron Technology, Inc.)

=INTERFACES BETWEEN HIGHER VOLTAGE AND LOWER VOLTAGE WAFERS AND RELATED APPARATUSES AND METHODS=


==Organization Name==

[[:Category:Micron Technology, Inc.|Micron Technology, Inc.]]


[[Category:Micron Technology, Inc.]]

==Inventor(s)==

[[:Category:Michael A. Smith of Boise ID (US)|Michael A. Smith of Boise ID (US)]][[Category:Michael A. Smith of Boise ID (US)]]

[[:Category:Kunal R. Parekh of Boise ID (US)|Kunal R. Parekh of Boise ID (US)]][[Category:Kunal R. Parekh of Boise ID (US)]]

[[:Category:Hernan A. Castro of Shingle Springs CA (US)|Hernan A. Castro of Shingle Springs CA (US)]][[Category:Hernan A. Castro of Shingle Springs CA (US)]]

==INTERFACES BETWEEN HIGHER VOLTAGE AND LOWER VOLTAGE WAFERS AND RELATED APPARATUSES AND METHODS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18315311 titled 'INTERFACES BETWEEN HIGHER VOLTAGE AND LOWER VOLTAGE WAFERS AND RELATED APPARATUSES AND METHODS

==Simplified Explanation==

The patent application describes interfaces between higher voltage and lower voltage wafers, along with related apparatuses and methods. Here are the key points:

* The apparatus consists of a memory wafer and a logic wafer.
* The memory wafer has data storage elements and bitlines connected to them.
* Isolation devices are also present, connected to the bitlines.
* The logic wafer is bonded to the memory wafer and contains logic circuitry.
* The logic circuitry is connected to the bitlines through the isolation devices.
* The logic circuitry has a maximum voltage difference tolerance lower than the operational voltage difference between the operational voltage potential and a reference voltage potential of the logic circuitry.
* The method involves isolating the logic circuitry from the bitlines, applying the operational voltage potential to the data storage elements, and then electrically connecting the logic circuitry to the bitlines.

Potential applications of this technology:

* Integrated circuits and electronic devices that require interfaces between higher and lower voltage components.
* Memory systems that need to connect memory wafers with logic wafers operating at different voltage potentials.

Problems solved by this technology:

* Enabling the integration of memory wafers and logic wafers operating at different voltage potentials.
* Providing a reliable and efficient interface between higher and lower voltage components.

Benefits of this technology:

* Allows for the efficient transfer of data between memory wafers and logic wafers.
* Provides a reliable and robust interface that can withstand voltage differences.
* Enables the development of more advanced and integrated electronic devices.


==Original Abstract Submitted==

Interfaces between higher voltage and lower voltage wafers and related apparatuses and methods are disclosed. An apparatus includes a memory wafer and a logic wafer. Data storage elements of an array are configured to perform an operation responsive to an operational voltage potential. The memory wafer also includes bitlines electrically connected to the data storage elements and isolation devices electrically connected to the bitlines. The logic wafer is bonded to the memory wafer. The logic wafer includes logic circuitry electrically connected to the bitlines through the isolation devices. A maximum voltage potential difference tolerance of the logic circuitry is less than an operational voltage potential difference between the operational voltage potential and a reference voltage potential of the logic circuitry. A method includes isolating the logic circuitry from the bitlines, applying the operational voltage potential the data storage elements, and electrically connecting the logic circuitry to the bitlines.



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