View source for 18305466. ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

=ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE=


==Organization Name==

[[:Category:INTERNATIONAL BUSINESS MACHINES CORPORATION|INTERNATIONAL BUSINESS MACHINES CORPORATION]]


[[Category:INTERNATIONAL BUSINESS MACHINES CORPORATION]]

==Inventor(s)==

[[:Category:Manuel Le Gallo-bourdeau of Horgen (CH)|Manuel Le Gallo-bourdeau of Horgen (CH)]][[Category:Manuel Le Gallo-bourdeau of Horgen (CH)]]

[[:Category:Athanasios Vasilopoulos of Zurich (CH)|Athanasios Vasilopoulos of Zurich (CH)]][[Category:Athanasios Vasilopoulos of Zurich (CH)]]

[[:Category:Benedikt Kersting of Zurich (CH)|Benedikt Kersting of Zurich (CH)]][[Category:Benedikt Kersting of Zurich (CH)]]

[[:Category:Julian Röttger B�chel of Zurich (CH)|Julian Röttger B�chel of Zurich (CH)]][[Category:Julian Röttger B�chel of Zurich (CH)]]

[[:Category:Abu Sebastian of Adliswil (CH)|Abu Sebastian of Adliswil (CH)]][[Category:Abu Sebastian of Adliswil (CH)]]

==ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18305466 titled 'ACCURATE PROGRAMMING OF ANALOG MEMORY DEVICES OF IN-MEMORY PROCESSING DEVICES HAVING A CROSSBAR ARRAY STRUCTURE

==Simplified Explanation==

The invention is a method of programming memory elements of an in-memory computing (IMC) device. The IMC applies a SET signal to the memory elements of each cell, reads conductance values, and adjusts the conductance values to match a target value.

* IMC applies a SET signal to memory elements to set them to a SET state.
* Reads conductance values of memory elements in the SET state.
* Adjusts the conductance values to match a target value.
* Maximizes the number of memory elements in SET or RESET states.

== Potential Applications ==
This technology could be applied in:
* In-memory computing systems
* Neuromorphic computing
* Artificial intelligence hardware

== Problems Solved ==
* Efficient programming of memory elements
* Matching conductance values to target values
* Maximizing the number of memory elements in desired states

== Benefits ==
* Improved performance of in-memory computing devices
* Enhanced efficiency in programming memory elements
* Optimal utilization of memory resources

== Potential Commercial Applications ==
Optimized Memory Element Programming for In-Memory Computing Devices

== Possible Prior Art ==
One possible prior art could be the use of traditional programming methods for memory elements in computing devices.

== Unanswered Questions ==
=== How does this method compare to traditional memory programming techniques? ===
This article does not provide a direct comparison to traditional memory programming methods, leaving a gap in understanding the advantages of this new approach.

=== What are the specific conductance values used in the programming process? ===
The article does not specify the exact conductance values or ranges utilized in the programming of memory elements, which could be crucial for understanding the implementation of this method.


==Original Abstract Submitted==

The invention is notably directed to a method of programming memory elements of an in-memory computing (IMC) device. The IMC applies a SET signal to the K memory elements of said each cell to set each of the K memory elements to a SET state and reading K conductance values of the K memory elements in the SET state. The IMC adjusts, based on the K conductance values read and the target conductance value, a conductance value of at least one of the K memory elements to match a summed conductance of the K memory elements of said each cell with the target conductance value. The IMC maximizes a number of the K memory elements that are either in their SET state or in a RESET state of zero conductance nominal value, such that at most one of the K memory elements is neither in a SET state nor in a RESET state.



[[Category:G06F3/06]]