View source for 18296503. MULTI LEVEL CONTACT ETCH simplified abstract (Tokyo Electron Limited)

=MULTI LEVEL CONTACT ETCH=


==Organization Name==

[[:Category:Tokyo Electron Limited|Tokyo Electron Limited]]


[[Category:Tokyo Electron Limited]]

==Inventor(s)==

[[:Category:Alec Dorfner of Miyagi (JP)|Alec Dorfner of Miyagi (JP)]][[Category:Alec Dorfner of Miyagi (JP)]]

[[:Category:Minjoon Park of Albany NY (US)|Minjoon Park of Albany NY (US)]][[Category:Minjoon Park of Albany NY (US)]]

==MULTI LEVEL CONTACT ETCH - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18296503 titled 'MULTI LEVEL CONTACT ETCH

The method described in the patent application involves processing a substrate by forming an etch stop layer (ESL) over a staircase pattern on the substrate, followed by the formation of a dielectric layer, planarization of the dielectric layer, and the creation of a patterned hardmask. The dielectric layer is then selectively etched using the patterned hardmask to create recesses that land on each of the staircases, with the ESL protecting the conductive surface during the etching process.

* Conformal etch stop layer (ESL) is formed over a staircase pattern on the substrate.
* Dielectric layer is formed over the ESL and planarized.
* Patterned hardmask is created over the dielectric layer.
* Dielectric layer is selectively etched using the patterned hardmask to create recesses landing on each staircase.
* ESL protects the conductive surface during the etching process.

Potential Applications:
- Semiconductor manufacturing
- Microelectronics industry
- Nanotechnology research

Problems Solved:
- Precise etching of dielectric layers
- Protection of underlying conductive surfaces during etching processes

Benefits:
- Improved accuracy in etching processes
- Enhanced protection of sensitive components
- Increased efficiency in substrate processing

Commercial Applications:
Title: Advanced Semiconductor Etching Technology for Microelectronics Industry
This technology can be utilized in the production of advanced semiconductor devices, leading to improved performance and reliability in electronic components. The market implications include increased demand for high-precision etching solutions in the microelectronics industry.

Questions about the technology:
1. How does the etch stop layer (ESL) contribute to the overall efficiency of the substrate processing?
2. What are the specific advantages of using a patterned hardmask in the etching process?


==Original Abstract Submitted==

A method of processing a substrate that includes: forming a conformal etch stop layer (ESL) over a staircase pattern of the substrate, the staircase pattern including staircases, each of the staircases including a conductive surface; forming a dielectric layer over the ESL; planarizing a top surface of the dielectric layer; forming a patterned hardmask over the dielectric layer; and etching the dielectric layer selectively to the ESL using the patterned hardmask as an etch mask to form a plurality of recesses, each of the plurality of recesses landing on each of the staircases, the ESL protecting the conductive surface from the etching, the etching including exposing the substrate to a plasma generated from a process gas including a fluorocarbon, O, and WF, a flow rate of WFbeing between 0.01% and 1% of a total gas flow rate of the process gas.



[[Category:H01L21/311]]
[[Category:H01L21/02]]
[[Category:H01L21/033]]
[[Category:H01L21/3105]]
[[Category:H01L21/768]]
[[Category:CPC_H01L21/31116]]