View source for 18219286. Adaptive Clocking Architecture (Arm Limited)

=Adaptive Clocking Architecture=


==Organization Name==

[[:Category:Arm Limited|Arm Limited]]


[[Category:Arm Limited]]

==Inventor(s)==

[[:Category:El Mehdi Boujamaa of Valbonne (FR)|El Mehdi Boujamaa of Valbonne (FR)]][[Category:El Mehdi Boujamaa of Valbonne (FR)]]

[[:Category:Robert Christiaan Schouten of Grasse (FR)|Robert Christiaan Schouten of Grasse (FR)]][[Category:Robert Christiaan Schouten of Grasse (FR)]]

[[:Category:Vincent Gouin of Mandelieu (FR)|Vincent Gouin of Mandelieu (FR)]][[Category:Vincent Gouin of Mandelieu (FR)]]

==Adaptive Clocking Architecture==


This abstract first appeared for US patent application 18219286 titled 'Adaptive Clocking Architecture




==Original Abstract Submitted==

Various implementations described herein are related to a device having adaptive clocking architecture with multiple stages of latches and buffers coupled in a delay line configuration. In some instances, each latch receives a delayed clock signal as data input and provides a sample out signal as a latched output based on a clock signal. Also, in some instances, each latch provides a delayed edge of a next clock cycle so as to stretch the pulse width of the clock signal.



[[Category:H03K5/06]]
[[Category:H03K3/037]]
[[Category:CPC_H03K5/06]]