View source for 18171428. PACKAGE DIES INCLUDING VERTICAL INTERCONNECTS FOR SIGNAL AND POWER DISTRIBUTION IN A THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) PACKAGE simplified abstract (QUALCOMM Incorporated)

=PACKAGE DIES INCLUDING VERTICAL INTERCONNECTS FOR SIGNAL AND POWER DISTRIBUTION IN A THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) PACKAGE=


==Organization Name==

[[:Category:QUALCOMM Incorporated|QUALCOMM Incorporated]]


[[Category:QUALCOMM Incorporated]]

==Inventor(s)==

[[:Category:Mustafa Badaroglu of San Diego CA (US)|Mustafa Badaroglu of San Diego CA (US)]][[Category:Mustafa Badaroglu of San Diego CA (US)]]

[[:Category:Zhongze Wang of San Diego CA (US)|Zhongze Wang of San Diego CA (US)]][[Category:Zhongze Wang of San Diego CA (US)]]

==PACKAGE DIES INCLUDING VERTICAL INTERCONNECTS FOR SIGNAL AND POWER DISTRIBUTION IN A THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) PACKAGE - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18171428 titled 'PACKAGE DIES INCLUDING VERTICAL INTERCONNECTS FOR SIGNAL AND POWER DISTRIBUTION IN A THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) PACKAGE

The abstract describes a 3D IC package that includes vertical interconnects for interconnections between package dies and a package substrate, as well as horizontal interconnects for distributing power and signals.

* Vertical interconnects extend between die contacts on different sides of the first package die.
* The second package die couples to the second die contacts of the first package die to form power and/or signal interconnects.
* Horizontal interconnects in a distribution layer on the first side of the first package die distribute power and signals horizontally between the die contacts and the vertical interconnects.

Potential Applications:
- Advanced semiconductor packaging
- High-performance computing systems
- Telecommunications equipment

Problems Solved:
- Improved interconnection efficiency
- Enhanced signal integrity
- Increased packaging density

Benefits:
- Higher performance capabilities
- Enhanced reliability
- Space-saving design

Commercial Applications:
- Semiconductor industry
- Electronics manufacturing
- Telecommunications sector

Questions about 3D IC Package:
1. How does the vertical interconnect technology improve signal integrity in the package?
2. What are the key advantages of using horizontal interconnects in the distribution layer?

Frequently Updated Research:
- Ongoing studies on optimizing vertical interconnect design
- Research on the impact of 3D IC packaging on overall system performance and efficiency.


==Original Abstract Submitted==

A 3D IC package includes a first package die having a first side coupled to a package substrate and a second side coupled to a second package die. The first package die includes vertical interconnects to provide interconnections between the second package die and the package substrate. The vertical interconnects each extend vertically between a first die contact on the first side of the first package die and a second die contact on the second side of the first package die. The second package die couples to the second die contacts of the first package die to form power and/or signal interconnects between the package substrate and the second package die. Horizontal interconnects in a distribution layer on the first side of the first package die distribute power and signals horizontally between the first die contacts and the vertical interconnects.



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[[Category:H01L23/48]]
[[Category:H01L23/528]]
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[[Category:CPC_H01L24/06]]