View source for 18158225. EMBEDDED TRACE SUBSTRATES (ETSs) WITH T-SHAPED INTERCONNECTS WITH REDUCED-WIDTH EMBEDDED METAL TRACES, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS simplified abstract (QUALCOMM Incorporated)

=EMBEDDED TRACE SUBSTRATES (ETSs) WITH T-SHAPED INTERCONNECTS WITH REDUCED-WIDTH EMBEDDED METAL TRACES, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS=


==Organization Name==

[[:Category:QUALCOMM Incorporated|QUALCOMM Incorporated]]


[[Category:QUALCOMM Incorporated]]

==Inventor(s)==

[[:Category:Seongryul Choi of Seongnam (KR)|Seongryul Choi of Seongnam (KR)]][[Category:Seongryul Choi of Seongnam (KR)]]

[[:Category:Joan Rey Villarba Buot of Escondido CA (US)|Joan Rey Villarba Buot of Escondido CA (US)]][[Category:Joan Rey Villarba Buot of Escondido CA (US)]]

[[:Category:Kuiwon Kang of San Diego CA (US)|Kuiwon Kang of San Diego CA (US)]][[Category:Kuiwon Kang of San Diego CA (US)]]

[[:Category:Zhijie Wang of San Diego CA (US)|Zhijie Wang of San Diego CA (US)]][[Category:Zhijie Wang of San Diego CA (US)]]

==EMBEDDED TRACE SUBSTRATES (ETSs) WITH T-SHAPED INTERCONNECTS WITH REDUCED-WIDTH EMBEDDED METAL TRACES, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18158225 titled 'EMBEDDED TRACE SUBSTRATES (ETSs) WITH T-SHAPED INTERCONNECTS WITH REDUCED-WIDTH EMBEDDED METAL TRACES, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS

The patent application describes embedded trace substrates (ETS) with T-shaped interconnects and reduced-width embedded metal traces, along with related IC packages and fabrication methods.

* ETS features an outer metallization layer with T-shaped interconnects for I/O connections.
* Embedded metal trace pitch is reduced to increase I/O interconnection density.
* T-shaped interconnects include additional metal contact pads to eliminate vertical connection gaps.
* Embedded metal traces are narrower than metal contact pads to allow for additional signal routing capacity.

Potential Applications:
- Integrated circuit packaging
- Semiconductor manufacturing
- Electronics industry

Problems Solved:
- Increased I/O interconnection density
- Elimination of vertical connection gaps
- Enhanced signal routing capacity

Benefits:
- Higher performance in IC packages
- Improved signal integrity
- Enhanced reliability in electronic devices

Commercial Applications:
Title: Advanced IC Packaging Technology for Enhanced Signal Routing
This technology can be used in various industries such as telecommunications, consumer electronics, and automotive for high-performance electronic devices.

Prior Art:
Researchers can explore prior patents related to embedded trace substrates, T-shaped interconnects, and signal routing in IC packages.

Frequently Updated Research:
Researchers can stay updated on advancements in embedded trace substrates, metallization techniques, and signal routing technologies for IC packages.

Questions about Embedded Trace Substrates:
1. How does the reduced-width of embedded metal traces impact signal routing capacity?
   - The reduced width allows for additional metal traces, increasing signal routing capacity.
2. What are the key advantages of using T-shaped interconnects in IC packages?
   - T-shaped interconnects help eliminate vertical connection gaps and improve signal integrity.


==Original Abstract Submitted==

Embedded trace substrates (ETS) having an ETS metallization layer with T-shaped interconnects with reduced-width embedded metal traces, and related integrated circuit (IC) packages and fabrication methods. The ETS includes an outer ETS metallization layer that includes T-shaped interconnects for supporting input/output (I/O) connections between the ETS and another opposing package substrate. To increase density of I/O interconnections, the pitch of the embedded metal traces in the ETS metallization layer is reduced. The T-shaped interconnects also each include an additional metal contact pad that is coupled to a respective embedded metal trace to increase the height of the embedded metal trace to eliminate a vertical connection gap between the ETS and an opposing package substrate. In the T-shape interconnects, their embedded metal traces are reduced in width in a horizontal direction(s) as compared to their respective metal contact pads to provide room for additional metal traces for additional signal routing capacity.



[[Category:H01L23/498]]
[[Category:H01L21/288]]
[[Category:H01L21/768]]
[[Category:H01L23/00]]
[[Category:CPC_H01L23/49838]]