View source for 18132472. DATA STORAGE DEVICE FOR CHECKING A DEFECT OF ROW LINES AND AN OPERATION METHOD THEREOF simplified abstract (Samsung Electronics Co., Ltd.)

=DATA STORAGE DEVICE FOR CHECKING A DEFECT OF ROW LINES AND AN OPERATION METHOD THEREOF=


==Organization Name==

[[:Category:Samsung Electronics Co., Ltd.|Samsung Electronics Co., Ltd.]]


[[Category:Samsung Electronics Co., Ltd.]]

==Inventor(s)==

[[:Category:KYUNGDUK Lee of Suwon-si (KR)|KYUNGDUK Lee of Suwon-si (KR)]][[Category:KYUNGDUK Lee of Suwon-si (KR)]]

[[:Category:Ho-Sung Ahn of Suwon-si (KR)|Ho-Sung Ahn of Suwon-si (KR)]][[Category:Ho-Sung Ahn of Suwon-si (KR)]]

[[:Category:Youn-Soo Cheon of Suwon-si (KR)|Youn-Soo Cheon of Suwon-si (KR)]][[Category:Youn-Soo Cheon of Suwon-si (KR)]]

==DATA STORAGE DEVICE FOR CHECKING A DEFECT OF ROW LINES AND AN OPERATION METHOD THEREOF - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18132472 titled 'DATA STORAGE DEVICE FOR CHECKING A DEFECT OF ROW LINES AND AN OPERATION METHOD THEREOF

==Simplified Explanation==

The patent application describes a data storage device that includes a memory device with multiple memory blocks and a memory controller to control the memory device. The memory blocks are connected with row lines, which include word lines. The memory controller is designed to check for resistive defects in the row lines (excluding the word lines) and adjust the program operation time of the memory block corresponding to the defective row line to be longer than the program operation time of the other memory blocks.

* The data storage device has a memory device with multiple memory blocks.
* The memory blocks are connected with row lines, which include word lines.
* The memory controller is responsible for controlling the memory device.
* The memory controller checks for resistive defects in the row lines (excluding the word lines).
* If a resistive defect is found, the program operation time of the corresponding memory block is set to be longer than the other memory blocks.

Potential applications of this technology:

* Data storage devices in various electronic devices such as smartphones, tablets, and computers.
* Solid-state drives (SSDs) used in data centers and servers.
* Memory devices in automotive systems, IoT devices, and wearable technology.

Problems solved by this technology:

* Identifying resistive defects in row lines of memory devices.
* Ensuring reliable and efficient programming of memory blocks.
* Preventing data corruption or loss due to resistive defects.

Benefits of this technology:

* Improved reliability and performance of data storage devices.
* Enhanced data integrity and durability.
* Cost-effective solution for detecting and managing resistive defects in memory devices.


==Original Abstract Submitted==

A data storage device including: a memory device including a plurality of memory blocks; and a memory controller configured to control the memory device, wherein the plurality of memory blocks are connected with row lines, wherein the row lines include word lines, wherein the memory controller is further configured to: check whether a resistive defect occurs at the row lines except for the word lines; and set a program operation time of a memory block corresponding to a row line, at which the resistive defect occurs, to be longer than a program operation time of the other memory blocks.



[[Category:G11C29/02]]
[[Category:G11C29/52]]