View source for 18090872. THREE-DIMENSIONAL NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME simplified abstract (Yangtze Memory Technologies Co., Ltd.)

=THREE-DIMENSIONAL NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME=


==Organization Name==

[[:Category:Yangtze Memory Technologies Co., Ltd.|Yangtze Memory Technologies Co., Ltd.]]


[[Category:Yangtze Memory Technologies Co., Ltd.]]

==Inventor(s)==

[[:Category:Beibei Li of Wuhan (CN)|Beibei Li of Wuhan (CN)]][[Category:Beibei Li of Wuhan (CN)]]

[[:Category:SiMin Liu of Wuhan (CN)|SiMin Liu of Wuhan (CN)]][[Category:SiMin Liu of Wuhan (CN)]]

[[:Category:Wei Xu of Wuhan (CN)|Wei Xu of Wuhan (CN)]][[Category:Wei Xu of Wuhan (CN)]]

[[:Category:Bin Yuan of Wuhan (CN)|Bin Yuan of Wuhan (CN)]][[Category:Bin Yuan of Wuhan (CN)]]

[[:Category:Bo Xu of Wuhan (CN)|Bo Xu of Wuhan (CN)]][[Category:Bo Xu of Wuhan (CN)]]

[[:Category:Yali Guo of Wuhan (CN)|Yali Guo of Wuhan (CN)]][[Category:Yali Guo of Wuhan (CN)]]

[[:Category:Zongke Xu of Wuhan (CN)|Zongke Xu of Wuhan (CN)]][[Category:Zongke Xu of Wuhan (CN)]]

[[:Category:Jiajia Wu of Wuhan (CN)|Jiajia Wu of Wuhan (CN)]][[Category:Jiajia Wu of Wuhan (CN)]]

[[:Category:ZongLiang Huo of Wuhan (CN)|ZongLiang Huo of Wuhan (CN)]][[Category:ZongLiang Huo of Wuhan (CN)]]

[[:Category:Lei Xue of Wuhan (CN)|Lei Xue of Wuhan (CN)]][[Category:Lei Xue of Wuhan (CN)]]

==THREE-DIMENSIONAL NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18090872 titled 'THREE-DIMENSIONAL NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME

The semiconductor device described in the abstract consists of decks stacked vertically over a semiconductor layer. Each deck contains alternating word line layers and insulating layers, with a gate line structure (GLS) and a channel structure extending through them. The GLS and channel structure have discontinuous sidewalls at the borders between neighboring decks.

* The semiconductor device features decks stacked vertically with alternating word line layers and insulating layers.
* The gate line structure (GLS) and channel structure extend through the word line layers and insulating layers of the decks.
* The GLS has a discontinuous sidewall at the border between two neighboring decks.
* The channel structure also has a discontinuous sidewall at the interface between two neighboring decks.
* The GLS includes a first GLS with a gate line slit, a second GLS with spaced-apart sub-GLSs in a horizontal direction, or a combination of both.

Potential Applications:
- This technology can be applied in the development of advanced semiconductor devices for various electronic applications.
- It can enhance the performance and efficiency of integrated circuits in electronic devices.

Problems Solved:
- Addresses the need for improved semiconductor device structures with enhanced functionality.
- Solves issues related to the integration of gate line structures and channel structures in stacked decks.

Benefits:
- Improved performance and efficiency of semiconductor devices.
- Enhanced functionality and reliability of integrated circuits.
- Potential for miniaturization and increased processing power in electronic devices.

Commercial Applications:
- This technology has potential commercial applications in the semiconductor industry for the development of advanced electronic devices.
- It can be utilized in the production of high-performance integrated circuits for various consumer electronics.

Questions about the technology:
1. How does the discontinuous sidewall design of the gate line structure and channel structure contribute to the performance of the semiconductor device?
2. What are the specific advantages of having alternating word line layers and insulating layers in the stacked decks of the semiconductor device?


==Original Abstract Submitted==

A semiconductor device includes decks stacked over a semiconductor layer in a vertical direction. Each deck includes alternating word line layers and insulating layers. A gate line structure (GLS) extends through the word line layers and the insulating layers of the decks. A channel structure extends through the word line layers and the insulating layers of the decks. A sidewall of the GLS is discontinuous at a border between two neighboring decks, and a sidewall of the channel structure is discontinuous at an interface between two neighboring decks. The GLS includes a first GLS that includes a gate line slit, a second GLS that includes sub-GLSs spaced apart from each other in a horizontal direction, or a combination thereof.



[[Category:H10B43/27]]
[[Category:CPC_H01L27/11582]]