View source for 18080635. ALLOCATION OF ACCESS TO A CHIPLET ACROSS AN INTERCONNECT SWITCH simplified abstract (Intel Corporation)

=ALLOCATION OF ACCESS TO A CHIPLET ACROSS AN INTERCONNECT SWITCH=


==Organization Name==

[[:Category:Intel Corporation|Intel Corporation]]


[[Category:Intel Corporation]]

==Inventor(s)==

[[:Category:Francesc Guim Bernat of Barcelona (ES)|Francesc Guim Bernat of Barcelona (ES)]][[Category:Francesc Guim Bernat of Barcelona (ES)]]

[[:Category:Marcos Carranza of Portland OR (US)|Marcos Carranza of Portland OR (US)]][[Category:Marcos Carranza of Portland OR (US)]]

[[:Category:Kshitij Doshi of Tempe AZ (US)|Kshitij Doshi of Tempe AZ (US)]][[Category:Kshitij Doshi of Tempe AZ (US)]]

[[:Category:Ned Smith of Beaverton OR (US)|Ned Smith of Beaverton OR (US)]][[Category:Ned Smith of Beaverton OR (US)]]

[[:Category:Karthik Kumar of Chandler AZ (US)|Karthik Kumar of Chandler AZ (US)]][[Category:Karthik Kumar of Chandler AZ (US)]]

==ALLOCATION OF ACCESS TO A CHIPLET ACROSS AN INTERCONNECT SWITCH - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18080635 titled 'ALLOCATION OF ACCESS TO A CHIPLET ACROSS AN INTERCONNECT SWITCH

'''Simplified Explanation:'''
The patent application discusses techniques and mechanisms to allocate functionality of a chiplet to one or more processor cores connected to a remote processor via a network switch.

'''Key Features and Innovation:'''
* Communication between a composite chip and a network switch via a Compute Express Link (CXL) link.
* Switch receives capability information identifying chiplet and available functionality.
* Switch provides an inventory of chiplet resources based on capability information.
* Switch configures a chip to enable allocation of chiplet resources.
* Chiplet resources can be allocated at a sub-processor level of granularity.

'''Potential Applications:'''
This technology can be applied in high-performance computing systems, data centers, and cloud computing environments where efficient allocation of chiplet resources is crucial.

'''Problems Solved:'''
This technology addresses the challenge of efficiently allocating chiplet resources to processor cores in a complex computing environment.

'''Benefits:'''
* Improved resource allocation efficiency.
* Enhanced performance of processor cores.
* Flexibility in managing chiplet resources.

'''Commercial Applications:'''
The technology can be utilized in the development of advanced computing systems for various industries such as artificial intelligence, scientific research, and financial services.

'''Prior Art:'''
Readers can explore prior research on chiplet technology, network switches, and resource allocation mechanisms in computing systems.

'''Frequently Updated Research:'''
Stay updated on advancements in chiplet technology, network switch capabilities, and resource allocation strategies in computing systems.

'''Questions about Chiplet Resource Allocation:'''
1. What are the key benefits of allocating chiplet resources at a sub-processor level of granularity?
2. How does the use of a network switch improve the efficiency of chiplet resource allocation in a computing system?


==Original Abstract Submitted==

Techniques and mechanisms to allocate functionality of a chiplet for access by one or more processor cores which are coupled to remote processor via a network switch. In an embodiment, a composite chip communicates with the switch via a Compute Express Link (CXL) link. The switch receives capability information which identifies both a chiplet of the composite chip, and a functionality which is available from a resource of that chiplet. Based on the capability information, the switch provides an inventory of chiplet resources. In response to an allocation request, the switch accesses the inventory to identify whether a suitable chiplet resource is available. Based on the access, the switch configures a chip to enable an allocation of a chiplet resource. In another embodiment, the chiplet resource is allocated at a sub-processor level of granularity, and disables access to the chiplet resource by one or more local processor cores.



[[Category:G06F21/60]]
[[Category:CPC_G06F21/604]]