View source for 18077131. MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL simplified abstract (Intel Corporation)

=MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL=


==Organization Name==

[[:Category:Intel Corporation|Intel Corporation]]


[[Category:Intel Corporation]]

==Inventor(s)==

[[:Category:Chuen Ming Tan of Bayan Lepas (MY)|Chuen Ming Tan of Bayan Lepas (MY)]][[Category:Chuen Ming Tan of Bayan Lepas (MY)]]

[[:Category:Venkataramani Gopalakrishnan of Folsom CA (US)|Venkataramani Gopalakrishnan of Folsom CA (US)]][[Category:Venkataramani Gopalakrishnan of Folsom CA (US)]]

[[:Category:Aneesh Tuljapurkar of Bangalore (IN)|Aneesh Tuljapurkar of Bangalore (IN)]][[Category:Aneesh Tuljapurkar of Bangalore (IN)]]

[[:Category:Vishwanath Somayaji of Bangalore (IN)|Vishwanath Somayaji of Bangalore (IN)]][[Category:Vishwanath Somayaji of Bangalore (IN)]]

[[:Category:Tabassum Yasmin of Bangalore (IN)|Tabassum Yasmin of Bangalore (IN)]][[Category:Tabassum Yasmin of Bangalore (IN)]]

==MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18077131 titled 'MECHANISM TO OVERRIDE STANDBY POWER IN LARGE MEMORY CONFIGURATION OF WORKSTATIONS TO ELIMINATE THE NEED TO INCREASE POWER OF STANDBY POWER RAIL

==Simplified Explanation==
The circuit described in the patent application allows for the re-use of existing power supply units in computing devices to support large memory configurations while in a sleep state to prevent data loss.

* The processor checks if the power requirement of memory modules exceeds the available power of the auxiliary power rail.
* If so, the processor sends an override signal to keep the power supply on in the sleep state.
* Switches disconnect the main power rails from components that can be turned off in the sleep state.
* A select circuit chooses one of the main rails to power the memory modules.

==Key Features and Innovation==
* Re-uses existing power supply units for large memory configurations in a sleep state.
* Processor determines power requirements of memory modules and controls power supply accordingly.
* Override signal keeps power supply on in sleep state if needed.
* Switches disconnect unnecessary components to save power.
* Select circuit chooses main rail to power memory modules.

==Potential Applications==
This technology can be applied in various computing devices where large memory configurations are needed, such as servers, workstations, and high-performance computers.

==Problems Solved==
This technology addresses the issue of data loss in large memory configurations when a computing device is in a sleep state by efficiently managing power supply.

==Benefits==
* Prevents data loss in large memory configurations during sleep state.
* Efficiently re-uses existing power supply units.
* Saves power by disconnecting unnecessary components.

==Commercial Applications==
* "Power Management Circuit for Large Memory Configurations" can be used in server farms, data centers, and high-performance computing environments to optimize power usage and prevent data loss.

==Prior Art==
Readers interested in prior art related to this technology can explore patents and research papers on power management circuits for memory configurations in computing devices.

==Frequently Updated Research==
Stay updated on the latest advancements in power management circuits for memory configurations in computing devices to ensure optimal performance and efficiency.

==Questions about Power Management Circuit for Large Memory Configurations==
===How does this technology improve power efficiency in computing devices?===
This technology improves power efficiency by selectively powering memory modules based on their power requirements, preventing unnecessary power consumption.

===What are the potential cost-saving benefits of implementing this power management circuit?===
Implementing this power management circuit can lead to cost savings by re-using existing power supply units and reducing overall power consumption in computing devices.


==Original Abstract Submitted==

Embodiments herein relate to a circuit which allows the re-use of an existing power supply units having main power rails and an auxiliary power rail, while supporting large memory configurations in a sleep state to avoid data loss. A processor determines whether a power requirement of memory modules in a computing device exceeds an available power of the auxiliary power rail. If this is the case, the processor asserts an override signal which is used by a logic circuit to force the power supply to remain on in the sleep state. A set of switches disconnect the main rails from other components which can be turned off in the sleep state. A select circuit selects one of the main rails to power the memory modules.



[[Category:G06F1/3225]]
[[Category:G06F1/3287]]
[[Category:CPC_G06F1/3225]]