View source for 17969891. ENHANCED ARTIFICIAL INTELLIGENCE FOR PERFORMANCE VALIDATION OF CORE INTEGRAETED CIRCUIT FEATURES simplified abstract (Intel Corporation)

=ENHANCED ARTIFICIAL INTELLIGENCE FOR PERFORMANCE VALIDATION OF CORE INTEGRAETED CIRCUIT FEATURES=


==Organization Name==

[[:Category:Intel Corporation|Intel Corporation]]


[[Category:Intel Corporation]]

==Inventor(s)==

[[:Category:Kunapareddy Chiranjeevi of Hyderabad (IN)|Kunapareddy Chiranjeevi of Hyderabad (IN)]][[Category:Kunapareddy Chiranjeevi of Hyderabad (IN)]]

[[:Category:Sakina Pitalwala of Bangalore (IN)|Sakina Pitalwala of Bangalore (IN)]][[Category:Sakina Pitalwala of Bangalore (IN)]]

[[:Category:Karthik Varadarajan Rajagopal of Bangalore (IN)|Karthik Varadarajan Rajagopal of Bangalore (IN)]][[Category:Karthik Varadarajan Rajagopal of Bangalore (IN)]]

==ENHANCED ARTIFICIAL INTELLIGENCE FOR PERFORMANCE VALIDATION OF CORE INTEGRAETED CIRCUIT FEATURES - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17969891 titled 'ENHANCED ARTIFICIAL INTELLIGENCE FOR PERFORMANCE VALIDATION OF CORE INTEGRAETED CIRCUIT FEATURES

==Simplified Explanation==

The patent application describes a system that uses artificial intelligence to validate the performance of integrated circuit features. Here is a simplified explanation of the abstract:

* Extract source and destination registers from instruction files
* Generate a dependency graph with macroinstructions as nodes and dependencies as edges
* Create a frequency distribution of instructions from trace files
* Predict ratios of performance stats to RTL stats using machine learning
* Generate recommended traces for debugging based on predicted ratios

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### Potential Applications of this Technology
- Quality assurance in integrated circuit design
- Performance optimization in hardware development

### Problems Solved by this Technology
- Ensuring accurate performance validation of integrated circuit features
- Streamlining the debugging process in hardware design

### Benefits of this Technology
- Increased efficiency in identifying and resolving performance issues
- Enhanced accuracy in predicting performance ratios

### Potential Commercial Applications of this Technology
#### Improving Integrated Circuit Performance Validation with AI

### Possible Prior Art
There may be prior art related to using machine learning for performance validation in hardware design, but specific examples are not provided in the abstract.

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### Unanswered Questions

#### How does the system handle complex dependencies between macroinstructions?
The abstract mentions generating a dependency graph, but it does not detail how the system manages intricate dependencies.

#### What types of machine learning models are used for predicting performance ratios?
While the abstract mentions using machine learning for prediction, it does not specify the exact models employed in the system.


==Original Abstract Submitted==

This disclosure describes systems, methods, and devices related to using artificial intelligence to validate performance of integrated circuit features. A device may extract, from instruction files, microinstructions source and destination registers; generate a dependency graph including macroinstructions as nodes and dependencies between macroinstructions as edges between the nodes; generate, based on the dependency graph, a frequency distribution of instructions from trace files, performance univariate autoregressive conditionally heteroscedastic (Perf uarch) stat files, and register transfer language (RTL) stat files, predictors for a machine learning model; generate, based on the Perf uarch stat files and the RTL stat files, ratios of Perf uarch stats to RTL stats as target stat ratios; generate, using the predictors and the machine learning model, predicted ratios of Perf uarch stats to RTL stats; and generate, using greedy constrained optimization, based on the target stat ratios and the predicted ratios, recommended traces for debugging.



[[Category:G06F30/398]]
[[Category:G06F30/27]]