View source for 17898929. ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR MEMORY-BASED COMMUNICATION QUEUES simplified abstract (Micron Technology, Inc.)

=ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR MEMORY-BASED COMMUNICATION QUEUES=


==Organization Name==

[[:Category:Micron Technology, Inc.|Micron Technology, Inc.]]


[[Category:Micron Technology, Inc.]]

==Inventor(s)==

[[:Category:Michael Keith Dugan of Richardson TX (US)|Michael Keith Dugan of Richardson TX (US)]][[Category:Michael Keith Dugan of Richardson TX (US)]]

[[:Category:Tony M. Brewer of Plano TX (US)|Tony M. Brewer of Plano TX (US)]][[Category:Tony M. Brewer of Plano TX (US)]]

==ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR MEMORY-BASED COMMUNICATION QUEUES - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17898929 titled 'ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR MEMORY-BASED COMMUNICATION QUEUES

==Simplified Explanation==

The system described in the patent application involves a host device, an accelerator device, and a multiple-channel interface for transferring ordered data between the host device and the accelerator device. The accelerator device includes a data movement processor and a reordering buffer to manage the data movement.

* The data movement processor in the accelerator device issues read commands for portions of the ordered data from the host device.
* An entry in the reordering buffer is allocated for each read command, along with a transaction identifier.
* Unordered responses containing portions of the ordered data and transaction identifiers are received from the host device via the multiple-channel interface.
* The responses are reordered in the reordering buffer based on the transaction identifiers to reconstruct the ordered data.

Potential applications of this technology:
* High-performance computing systems
* Data processing applications requiring efficient data movement and reordering

Problems solved by this technology:
* Efficient management of data movement between host and accelerator devices
* Ensuring ordered data is reconstructed correctly despite unordered responses

Benefits of this technology:
* Improved data processing speed and efficiency
* Enhanced performance of systems utilizing host and accelerator devices


==Original Abstract Submitted==

A system includes a host device having a first buffer with ordered data. An accelerator device has a data movement processor and a reordering buffer. A multiple-channel interface couples the host device and the data movement processor of the accelerator device. The data movement processor is configured to issue a read command for a portion of the ordered data. In coordination with issuing the read command, an entry of the reordering buffer is allocated. A transaction identifier for the read command is allocated. Unordered responses are received from the host device via the multiple-channel interface. The responses include respective portions of the ordered data and a respective transaction identifier. The responses are reordered in the reordering buffer based on the respective transaction identifiers and the allocated entry of the reordering buffer.



[[Category:G06F3/06]]