View source for 17872473. CHIP PACKAGE ASSEMBLY, ELECTRONIC DEVICE, AND PREPARATION METHOD OF CHIP PACKAGE ASSEMBLY simplified abstract (Huawei Technologies Co., Ltd.)

=CHIP PACKAGE ASSEMBLY, ELECTRONIC DEVICE, AND PREPARATION METHOD OF CHIP PACKAGE ASSEMBLY=


==Organization Name==

[[:Category:Huawei Technologies Co., Ltd.|Huawei Technologies Co., Ltd.]]


[[Category:Huawei Technologies Co., Ltd.]]

==Inventor(s)==

[[:Category:Hao Peng of Shanghai (CN)|Hao Peng of Shanghai (CN)]][[Category:Hao Peng of Shanghai (CN)]]

[[:Category:Xiaojing Liao of Shanghai (CN)|Xiaojing Liao of Shanghai (CN)]][[Category:Xiaojing Liao of Shanghai (CN)]]

[[:Category:Zhaozheng Hou of Dongguan (CN)|Zhaozheng Hou of Dongguan (CN)]][[Category:Zhaozheng Hou of Dongguan (CN)]]

==CHIP PACKAGE ASSEMBLY, ELECTRONIC DEVICE, AND PREPARATION METHOD OF CHIP PACKAGE ASSEMBLY - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17872473 titled 'CHIP PACKAGE ASSEMBLY, ELECTRONIC DEVICE, AND PREPARATION METHOD OF CHIP PACKAGE ASSEMBLY

==Simplified Explanation==

The patent application describes a chip package assembly for electronic devices, along with a method for preparing it. The assembly includes a package substrate, a chip, and a heat dissipation part. The chip is embedded in the package substrate and has front and back electrodes. The package substrate has upper and lower conductive layers, with a conductive part connecting them. The front electrode is connected to the lower conductive layer, and the back electrode is connected to the upper conductive layer. The heat dissipation part is connected to the upper conductive layer, away from the chip. All three layers conduct heat.

* Chip package assembly for electronic devices
* Package substrate with upper and lower conductive layers
* Chip embedded in the package substrate with front and back electrodes
* Conductive part connecting the upper and lower conductive layers
* Front electrode connected to the lower conductive layer
* Back electrode connected to the upper conductive layer
* Heat dissipation part connected to the upper conductive layer
* All three layers conduct heat

==Potential Applications==
* Electronic devices requiring efficient heat dissipation
* High-performance computing systems
* Mobile devices with compact designs

==Problems Solved==
* Efficient heat dissipation in chip package assemblies
* Overheating issues in electronic devices
* Ensuring optimal performance and longevity of electronic components

==Benefits==
* Improved heat dissipation capabilities
* Enhanced performance and reliability of electronic devices
* Compact design for mobile devices
* Cost-effective manufacturing process


==Original Abstract Submitted==

This application discloses a chip package assembly, an electronic device, and a preparation method of a chip package assembly. The chip package assembly includes a package substrate, a chip, and a heat dissipation part. The package substrate includes an upper conductive layer, a lower conductive layer, and a conductive part connected between the upper conductive layer and the lower conductive layer. The chip includes a front electrode and a back electrode that are disposed opposite each other, the chip is embedded in the package substrate, the conductive part surrounds the chip, the front electrode is connected to the lower conductive layer, and the back electrode is connected to the upper conductive layer. The heat dissipation part is connected to a surface of the upper conductive layer that is away from the chip. The upper conductive layer, the lower conductive layer, and the conductive part each conduct heat.



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