View source for 17568361. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

=SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME=


==Organization Name==

[[:Category:SAMSUNG ELECTRONICS CO., LTD.|SAMSUNG ELECTRONICS CO., LTD.]]


[[Category:SAMSUNG ELECTRONICS CO., LTD.]]

==Inventor(s)==

[[:Category:HYUNSOO Chung of HWASEONG-SI (KR)|HYUNSOO Chung of HWASEONG-SI (KR)]][[Category:HYUNSOO Chung of HWASEONG-SI (KR)]]

[[:Category:YOUNG LYONG Kim of ANYANG-SI (KR)|YOUNG LYONG Kim of ANYANG-SI (KR)]][[Category:YOUNG LYONG Kim of ANYANG-SI (KR)]]

[[:Category:INHYO Hwang of ASAN-SI (KR)|INHYO Hwang of ASAN-SI (KR)]][[Category:INHYO Hwang of ASAN-SI (KR)]]

==SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17568361 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

==Simplified Explanation==

The patent application describes a semiconductor package that includes multiple semiconductor chips stacked on top of each other. The chips are connected through solder balls and encapsulated with molding layers.

* The semiconductor package includes a first semiconductor chip on a substrate.
* A buried solder ball is placed on the substrate, spaced apart from the first semiconductor chip.
* A first molding layer encapsulates and exposes the first semiconductor chip and the buried solder ball.
* A second semiconductor chip is placed on top of the first molding layer, overlapping the buried solder ball and a portion of the first semiconductor chip.
* A second molding layer covers the second semiconductor chip.
* The second semiconductor chip is supported on the first semiconductor chip through a dummy solder ball.
* The second semiconductor chip is connected to the buried solder ball through a signal solder ball.

Potential applications of this technology:

* Integrated circuits and electronic devices that require multiple stacked semiconductor chips.
* High-density packaging for compact electronic devices.
* Improved performance and functionality of electronic devices.

Problems solved by this technology:

* Enables efficient stacking of multiple semiconductor chips in a compact package.
* Provides reliable electrical connections between the stacked chips.
* Reduces the overall size and weight of electronic devices.

Benefits of this technology:

* Increased functionality and performance of electronic devices.
* Enhanced reliability and durability of stacked semiconductor chips.
* Cost-effective manufacturing process for semiconductor packages.


==Original Abstract Submitted==

A semiconductor package includes a first semiconductor chip on a substrate, a buried solder ball on the substrate and spaced apart from the first semiconductor chip, a first molding layer on the substrate and encapsulating and exposing the first semiconductor chip and the buried solder ball, a second semiconductor chip on the first molding layer and vertically overlapping the buried solder ball and a portion of the first semiconductor chip, and a second molding layer on the first molding layer and covering the second semiconductor chip. The second semiconductor chip is supported on the first semiconductor chip through a dummy solder ball between the first and second semiconductor chips. The second semiconductor chip is connected to the buried solder ball through a signal solder ball between the buried solder ball and the second semiconductor chip.



[[Category:H01L25/065]]
[[Category:H01L23/31]]
[[Category:H01L23/498]]
[[Category:H01L23/00]]
[[Category:H01L25/00]]