US Patent Application 18447965. Polysilicon Removal In Word Line Contact Region Of Memory Devices simplified abstract

Polysilicon Removal In Word Line Contact Region Of Memory Devices

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Yen-Jou Wu of Hsinchu (TW)

Hsin-Hui Lin of Hsinchu (TW)

Yu-Liang Wang of Hsinchu (TW)

Chih-Ming Lee of Tainan City (TW)

Keng-Ying Liao of Tainan City (TW)

Ping-Pang Hsieh of Tainan City (TW)

Su-Yu Yeh of Tainan City (TW)

Polysilicon Removal In Word Line Contact Region Of Memory Devices - A simplified explanation of the abstract

This abstract first appeared for US patent application 18447965 titled 'Polysilicon Removal In Word Line Contact Region Of Memory Devices

Simplified Explanation

The abstract describes a process for removing material between polysilicon lines in a memory cell strap region.

• The process involves depositing a first hard mask layer in a divot on top of a polysilicon layer between two polysilicon gates.
• A second hard mask layer is then deposited on top of the first hard mask layer.
• A first etch is performed to remove the second hard mask layer and a portion of the first hard mask layer from the divot.
• A second etch is performed to remove the remaining second hard mask layer from the divot.
• Finally, a third etch is performed to remove the polysilicon layer not covered by the hard mask layers, creating a separation between the two polysilicon gates.

Original Abstract Submitted

The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines. The patterning process includes depositing a first hard mask layer in a divot formed on a top portion of a polysilicon layer interposed between a first polysilicon gate structure and a second polysilicon gate; depositing a second hard mask layer on the first hard mask layer. The patterning process also includes performing a first etch to remove the second hard mask layer and a portion of the second hard mask layer from the divot; performing a second etch to remove the second hard mask layer from the divot; and performing a third etch to remove the polysilicon layer not covered by the first and second hard mask layers to form a separation between the first polysilicon gate structure and the second polysilicon structure.