US Patent Application 18446849. Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals simplified abstract

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Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Jerrin Pathrose Vareed of Hsinchu (TW)]]

[[Category:Shiba Mohanty of Hsinchu (TW)]]

Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals - A simplified explanation of the abstract

This abstract first appeared for US patent application 18446849 titled 'Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals

Simplified Explanation

The patent application describes a semiconductor device that includes an input, a level shifter, an output, and a switch module. The device is designed to mitigate the delay between input and output signals.

  • The device has an input that receives an input signal in a first voltage domain.
  • A level shifter is connected to the input and is responsible for shifting the input signal from the first voltage domain to a second voltage domain.
  • The device also includes a switch module that can connect either the input or the level shifter to the output.
  • The purpose of the device is to reduce the delay between the input and output signals of the semiconductor device.
  • The method of mitigating the delay is not explicitly described in the abstract.


Original Abstract Submitted

A semiconductor device includes an input, a level shifter, an output, and a switch module. The input is configured to receive an input signal in a first voltage domain. The level shifter is connected to the input and is configured to shift the input signal from the first voltage domain to a second voltage domain. The switch module is configured to connect one of the input and the level shifter to the output. A method of mitigating a delay between input and output signals of the semiconductor device is also disclosed.

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