US Patent Application 18446094. SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF simplified abstract

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SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Shih-Yao Lin of New Taipei City (TW)]]

[[Category:Hsiao Wen Lee of Hsinchu City (TW)]]

[[Category:Chih-Han Lin of Hsinchu City (TW)]]

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18446094 titled 'SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

Simplified Explanation

The patent application describes a semiconductor device that includes two semiconductor fins and a dielectric fin between them. The device also has a gate structure that is perpendicular to the fins.

  • The semiconductor device has two semiconductor fins and a dielectric fin between them.
  • The gate structure is perpendicular to the fins and consists of two portions.
  • The top surface of the dielectric fin is above the top surfaces of the semiconductor fins.
  • The gate structure is electrically isolated by the dielectric fin.
  • The first portion of the gate structure overlays an edge portion of the first semiconductor fin.
  • The second portion of the gate structure overlays a non-edge portion of the second semiconductor fin.


Original Abstract Submitted

A semiconductor device includes a first semiconductor fin extending along a first direction. The semiconductor device includes a second semiconductor fin also extending along the first direction. The semiconductor device includes a dielectric fin disposed between the first and second semiconductor fins, wherein the dielectric fin also extends along the first direction. The semiconductor device includes a gate structure extending along a second direction perpendicular to the first direction, the gate structure comprising a first portion and a second portion. A top surface of the dielectric fin is vertically above respective top surfaces of the first and second semiconductor fins. The first portion and the second portion are electrically isolated by the dielectric fin. The first portion of the gate structure overlays an edge portion of the first semiconductor fin, and the second portion of the gate structure overlays a non-edge portion of the second semiconductor fin.

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