US Patent Application 18366274. SEMICONDUCTOR FEATURE AND METHOD FOR MANUFACTURING THE SAME simplified abstract
Contents
SEMICONDUCTOR FEATURE AND METHOD FOR MANUFACTURING THE SAME
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Harry-Hak-Lay Chuang of Hsinchu (TW)
Chung-Jen Huang of Hsinchu (TW)
SEMICONDUCTOR FEATURE AND METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18366274 titled 'SEMICONDUCTOR FEATURE AND METHOD FOR MANUFACTURING THE SAME
Simplified Explanation
The patent application describes a semiconductor feature with various components and structures.
- The feature includes a semiconductor substrate, a dielectric structure, and a semiconductor device.
- An interconnecting structure is connected to the semiconductor device and is located within the dielectric structure.
- An STI (shallow trench isolation) structure surrounds the semiconductor device in the semiconductor substrate.
- Two DTI (deep trench isolation) structures penetrate both the semiconductor substrate and the STI structure, also surrounding the semiconductor device.
- A passivation structure is connected to the semiconductor substrate and the DTI structures, and is located opposite to the interconnecting structure.
- A conductive structure is surrounded by the passivation structure and penetrates the semiconductor substrate and the STI structure into the dielectric structure.
- The conductive structure is located between the DTI structures and is electrically connected to the semiconductor device via the interconnecting structure.
Original Abstract Submitted
A semiconductor feature includes: a semiconductor substrate; a dielectric structure and a semiconductor device disposed on the semiconductor substrate; an interconnecting structure disposed in the dielectric structure and connected to the semiconductor device; an STI structure disposed in the semiconductor substrate and surrounding the semiconductor device; two DTI structures penetrating the semiconductor substrate and the STI structure and surrounding the semiconductor device; a passivation structure connected to the semiconductor substrate and the DTI structures and located opposite to the interconnecting structure; and a conductive structure surrounded by the passivation structure, penetrating the semiconductor substrate and the STI structure into the dielectric structure, located between the DTI structures and electrically connected to the semiconductor device via the interconnecting structure.
