US Patent Application 18366120. HIGH CAPACITANCE MIM DEVICE WITH SELF ALIGNED SPACER simplified abstract
Contents
HIGH CAPACITANCE MIM DEVICE WITH SELF ALIGNED SPACER
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Hsuan-Han Tseng of Tainan City (TW)
Chun-Yuan Chen of Tainan City (TW)
Lu-Sheng Chou of Tainan City (TW)
Hsiao-Hui Tseng of Tainan City (TW)
Jhy-Jyi Sze of Hsin-Chu City (TW)
HIGH CAPACITANCE MIM DEVICE WITH SELF ALIGNED SPACER - A simplified explanation of the abstract
This abstract first appeared for US patent application 18366120 titled 'HIGH CAPACITANCE MIM DEVICE WITH SELF ALIGNED SPACER
Simplified Explanation
- The patent application describes a method of forming a capacitor structure. - The method involves the formation of a capacitor dielectric layer over a lower electrode layer. - An upper electrode layer is then formed over the capacitor dielectric layer. - The upper electrode layer is etched to create an upper electrode and expose a portion of the capacitor dielectric layer. - A spacer structure is formed over the upper electrode layer and the capacitor dielectric layer, as well as along the sidewalls of the upper electrode. - The spacer structure is then etched to remove it from the horizontal surfaces of the upper electrode layer and the capacitor dielectric layer, leaving behind a spacer. - The capacitor dielectric layer and the lower electrode layer are etched according to the spacer, resulting in the definition of a capacitor dielectric and a lower electrode.
Original Abstract Submitted
The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.
