US Patent Application 18363751. METHODS OF FORMING MEMORY DEVICES simplified abstract

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METHODS OF FORMING MEMORY DEVICES

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Hung-Li Chiang of Taipei City (TW)]]

[[Category:Jer-Fu Wang of Taipei City (TW)]]

[[Category:Chao-Ching Cheng of Hsinchu City (TW)]]

[[Category:Tzu-Chiang Chen of Hsinchu City (TW)]]

METHODS OF FORMING MEMORY DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18363751 titled 'METHODS OF FORMING MEMORY DEVICES

Simplified Explanation

The patent application describes a method of forming a memory device. Here are the key points:

  • The method involves forming a first conductive plug within a dielectric layer on a substrate.
  • A treating process is performed to transform a portion of the first conductive plug into a buffer layer, which covers the remaining portion of the plug.
  • A phase change layer and a top electrode are then formed over the buffer layer.
  • A second dielectric layer is formed to encapsulate the top electrode and the underlying phase change layer.
  • A second conductive plug is formed within the second dielectric layer, making physical contact with the top electrode.
  • Additionally, a filamentary bottom electrode is formed within the buffer layer.

Overall, this method allows for the creation of a memory device with specific layers and plugs, providing improved performance and functionality.


Original Abstract Submitted

A method of forming a memory device includes the following operations. A first conductive plug is formed within a first dielectric layer over a substrate. A treating process is performed to transform a portion of the first conductive plug into a buffer layer, and the buffer layer caps the remaining portion of the first conductive plug. A phase change layer and a top electrode are sequentially formed over the buffer layer. A second dielectric layer is formed to encapsulate the top electrode and the underlying phase change layer. A second conductive plug is formed within the second dielectric layer and in physical contact with the top electrode. A filamentary bottom electrode is formed within the buffer layer.