US Patent Application 18363363. INTEGRATED CIRCUIT PACKAGE AND METHOD simplified abstract
Contents
INTEGRATED CIRCUIT PACKAGE AND METHOD
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Hsien-Wei Chen of Hsinchu (TW)
Ming-Fa Chen of Taichung City (TW)
Sung-Feng Yeh of Taipei City (TW)
INTEGRATED CIRCUIT PACKAGE AND METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18363363 titled 'INTEGRATED CIRCUIT PACKAGE AND METHOD
Simplified Explanation
The patent application describes a device that includes multiple integrated circuit devices attached to an interposer, with a heat dissipation die and an encapsulant.
- The device consists of an interposer, which serves as a platform for attaching integrated circuit devices.
- There are two integrated circuit devices attached to the interposer, with one placed adjacent to the other.
- A heat dissipation die is positioned on top of the second integrated circuit device to dissipate heat effectively.
- An encapsulant surrounds the heat dissipation die and both integrated circuit devices, providing protection and structural integrity.
- The top surface of the encapsulant is at the same level as the top surface of the heat dissipation die and the first integrated circuit device, ensuring a smooth and even surface.
Original Abstract Submitted
In an embodiment, a device includes: an interposer; a first integrated circuit device attached to the interposer; a second integrated circuit device attached to the interposer adjacent the first integrated circuit device; a heat dissipation die on the second integrated circuit device; and an encapsulant around the heat dissipation die, the second integrated circuit device, and the first integrated circuit device, a top surface of the encapsulant being coplanar with a top surface of the heat dissipation die and a top surface of the first integrated circuit device.
