US Patent Application 18362839. SEMICONDUCTOR DEVICE INCLUDING STANDARD-CELL-ADAPTED POWER GRID ARRANGEMENT simplified abstract

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SEMICONDUCTOR DEVICE INCLUDING STANDARD-CELL-ADAPTED POWER GRID ARRANGEMENT

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Hiranmay Biswas of Hsinchu (TW)

Chung-Hsing Wang of Hsinchu (TW)

Chin-Shen Lin of Hsinchu (TW)

Kuo-Nan Yang of Hsinchu (TW)

SEMICONDUCTOR DEVICE INCLUDING STANDARD-CELL-ADAPTED POWER GRID ARRANGEMENT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18362839 titled 'SEMICONDUCTOR DEVICE INCLUDING STANDARD-CELL-ADAPTED POWER GRID ARRANGEMENT

Simplified Explanation

The patent application describes a method for fabricating a power grid arrangement in a semiconductor.

  • The method involves forming a first layer with conductive lines, which are divided into alpha and beta lines for different reference voltages.
  • A second layer is then formed over the first layer, with segments also divided into alpha and beta segments for the reference voltages.
  • The beta segments in the second layer are positioned asymmetrically between the corresponding alpha segments, relative to a specific direction.


Original Abstract Submitted

A method (of fabricating a power grid (PG) arrangement in a semiconductor) includes: forming a first layer including conductive lines (C_1st lines) which include interspersed alpha C_1st lines and beta C_1st lines designated correspondingly for first and second reference voltages; and forming a second layer over the first layer, the second layer including segments (C_2nd segments) which include interspersed alpha C_2nd segments and beta C_2nd segments designated correspondingly for the first and second reference voltages; and, relative to the first direction, each beta C_2nd segment being substantially asymmetrically between corresponding adjacent ones of the alpha C_2nd segments.