US Patent Application 18362707. TRANSISTOR ISOLATION REGIONS AND METHODS OF FORMING THE SAME simplified abstract

TRANSISTOR ISOLATION REGIONS AND METHODS OF FORMING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Szu-Ying Chen of Hsinchu (TW)

Sen-Hong Syue of Zhubei City (TW)

Huicheng Chang of Tainan City (TW)

Yee-Chia Yeo of Hsinchu (TW)

TRANSISTOR ISOLATION REGIONS AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18362707 titled 'TRANSISTOR ISOLATION REGIONS AND METHODS OF FORMING THE SAME

Simplified Explanation

The patent application describes a method for creating a hybrid fin structure in a substrate using specific deposition processes.

• The method involves etching a trench in a substrate.
• A liner material is then deposited in the trench using an atomic layer deposition process.
• A flowable material is deposited on top of the liner material and in the trench using a contouring flowable chemical vapor deposition process.
• The liner material and the flowable material are converted into a solid insulation material.
• However, a portion of the trench remains unfilled by the solid insulation material.
• In this unfilled portion, a hybrid fin structure is formed.

Original Abstract Submitted

In an embodiment, a method includes: etching a trench in a substrate; depositing a liner material in the trench with an atomic layer deposition process; depositing a flowable material on the liner material and in the trench with a contouring flowable chemical vapor deposition process; converting the liner material and the flowable material to a solid insulation material, a portion of the trench remaining unfilled by the solid insulation material; and forming a hybrid fin in the portion of the trench unfilled by the solid insulation material.