US Patent Application 18361666. POWER RAIL AND SIGNAL LINE ARRANGEMENT IN INTEGRATED CIRCUITS HAVING STACKED TRANSISTORS simplified abstract

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POWER RAIL AND SIGNAL LINE ARRANGEMENT IN INTEGRATED CIRCUITS HAVING STACKED TRANSISTORS

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Chih-Liang Chen of Hsinchu (TW)]]

[[Category:Guo-Huei Wu of Hsinchu (TW)]]

[[Category:Ching-Wei Tsai of Hsinchu (TW)]]

[[Category:Shang-Wen Chang of Hsinchu (TW)]]

[[Category:Li-Chun Tien of Hsinchu (TW)]]

POWER RAIL AND SIGNAL LINE ARRANGEMENT IN INTEGRATED CIRCUITS HAVING STACKED TRANSISTORS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18361666 titled 'POWER RAIL AND SIGNAL LINE ARRANGEMENT IN INTEGRATED CIRCUITS HAVING STACKED TRANSISTORS

Simplified Explanation

The patent application describes an integrated circuit device that includes two types of transistors stacked together.

  • The device has a front-side power rail and signal line, as well as a back-side power rail and signal line.
  • The front-side conductive layer is located above the active-region semiconductor structures, while the back-side conductive layer is located below them.


Original Abstract Submitted

An integrated circuit device includes a first-type transistor having a channel region in a first-type active-region semiconductor structure and a second-type transistor having a channel region in a second-type active-region semiconductor structure which is stacked with the first-type active-region semiconductor structure. In the integrated circuit, a front-side power rail and a front-side signal line in a front-side conductive layer extend in the first direction is, and a back-side power rail and a back-side signal line in a back-side conductive layer also extend in the first direction. The front-side conductive layer is above the first-type active-region semiconductor structure and the second-type active-region semiconductor structure, while the back-side conductive layer is below the first-type active-region semiconductor structure and the second-type active-region semiconductor structure.

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