US Patent Application 18360546. METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE simplified abstract

From WikiPatents
Jump to navigation Jump to search

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Harry-Hak-Lay Chuang of Singapore (SG)

Bao-Ru Young of Zhubei City (TW)

Wei Cheng Wu of Zhubei City (TW)

Meng-Fang Hsu of Hsinchu City (TW)

Kong-Pin Chang of Caotun Township (TW)

Chia Ming Liang of Taipei (TW)

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18360546 titled 'METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

Simplified Explanation

The patent application describes a method for fabricating a semiconductor device using a silicon substrate and an isolation feature.

  • The method involves etching a recess in the substrate and growing a silicon layer in the recess to form a channel.
  • The channel is doped with a second dopant to enhance its conductivity.
  • A barrier layer, made of either silicon carbon or silicon oxide, is formed between the substrate and the silicon layer to prevent unwanted interactions.
  • The barrier layer can be formed before or after the channel is created.
  • A gate electrode is then formed over the channel, and a source and drain are formed in the substrate.
  • The method allows for the fabrication of a semiconductor device with improved performance and reliability.


Original Abstract Submitted

A method for fabricating a semiconductor device includes receiving a silicon substrate having an isolation feature disposed on the substrate and a well adjacent the isolation feature, wherein the well includes a first dopant. The method also includes etching a recess to remove a portion of the well and epitaxially growing a silicon layer (EPI layer) in the recess to form a channel, wherein the channel includes a second dopant. The method also includes forming a barrier layer between the well and the EPI layer, the barrier layer including at least one of either silicon carbon or silicon oxide. The barrier layer can be formed either before or after the channel. The method further includes forming a gate electrode disposed over the channel and forming a source and drain in the well.