US Patent Application 18360085. SEMICONDUCTOR DEVICES WITH BACKSIDE VIA AND METHODS THEREOF simplified abstract

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SEMICONDUCTOR DEVICES WITH BACKSIDE VIA AND METHODS THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Po-Yu Huang of Hsinchu (TW)]]

[[Category:Chen-Ming Lee of Taoyuan County (TW)]]

[[Category:I-Wen Wu of Hsinchu City (TW)]]

[[Category:Fu-Kai Yang of Hsinchu City (TW)]]

[[Category:Mei-Yun Wang of Hsin-Chu (TW)]]

SEMICONDUCTOR DEVICES WITH BACKSIDE VIA AND METHODS THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18360085 titled 'SEMICONDUCTOR DEVICES WITH BACKSIDE VIA AND METHODS THEREOF

Simplified Explanation

The abstract describes a semiconductor structure and a method of forming it.

  • The semiconductor structure includes a gate structure, a drain feature, a source feature, a backside source contact, an isolation feature, a drain contact, and a gate contact via.
  • The gate structure is located over a channel region of an active region.
  • The drain feature is located over a drain region of the active region.
  • The source feature is located over a source region of the active region.
  • The backside source contact is positioned under the source feature.
  • The isolation feature is placed on and in contact with the source feature.
  • The drain contact is located over and electrically connected to the drain feature.
  • The gate contact via is positioned over and electrically connected to the gate structure.
  • The distance between the gate contact via and the drain contact is greater than the distance between the gate contact via and the isolation feature.
  • This semiconductor structure reduces parasitic capacitance and increases the leakage window.


Original Abstract Submitted

A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a gate structure disposed over a channel region of an active region, a drain feature disposed over a drain region of the active region; a source feature disposed over a source region of the active region, a backside source contact disposed under the source feature, an isolation feature disposed on and in contact with the source feature, a drain contact disposed over and electrically coupled to the drain feature, and a gate contact via disposed over and electrically coupled to the gate structure. A distance between the gate contact via and the drain contact is greater than a distance between the gate contact via and the isolation feature. The exemplary semiconductor structure would have a reduced parasitic capacitance and an enlarged leakage window.

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