US Patent Application 18356860. Dipole-Engineered High-K Gate Dielectric and Method Forming Same simplified abstract

Dipole-Engineered High-K Gate Dielectric and Method Forming Same

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Te-Yang Lai of Hsinchu (TW)

Chun-Yen Peng of Hsinchu (TW)

Sai-Hooi Yeong of Zhubei City (TW)

Chi On Chui of Hsinchu (TW)

Dipole-Engineered High-K Gate Dielectric and Method Forming Same - A simplified explanation of the abstract

This abstract first appeared for US patent application 18356860 titled 'Dipole-Engineered High-K Gate Dielectric and Method Forming Same

Simplified Explanation

The patent application describes a method for forming a gate electrode on a semiconductor region using high-k dielectric layers and a dipole film.

• The method involves forming an oxide layer on the semiconductor region.
• A first high-k dielectric layer is then deposited over the oxide layer, followed by a second high-k dielectric layer.
• The second high-k dielectric layer is made of a different material than the first high-k dielectric layer.
• A dipole film is deposited and contacts either the first or second high-k dielectric layer.
• An annealing process is performed to drive-in a dipole dopant from the dipole film into the layer it contacts.
• The dipole film is then removed.
• Finally, a gate electrode is formed over the second high-k dielectric layer.

Original Abstract Submitted

A method includes forming an oxide layer on a semiconductor region, and depositing a first high-k dielectric layer over the oxide layer. The first high-k dielectric layer is formed of a first high-k dielectric material. The method further includes depositing a second high-k dielectric layer over the first high-k dielectric layer, wherein the second high-k dielectric layer is formed of a second high-k dielectric material different from the first high-k dielectric material, depositing a dipole film over and contacting a layer selected from the first high-k dielectric layer and the second high-k dielectric layer, performing an annealing process to drive-in a dipole dopant in the dipole film into the layer, removing the dipole film, and forming a gate electrode over the second high-k dielectric layer.