US Patent Application 18354995. Dummy Gate Cutting Process and Resulting Gate Structures simplified abstract
Contents
Dummy Gate Cutting Process and Resulting Gate Structures
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Shih-Yao Lin of New Taipei City (TW)
Shu-Yuan Ku of Zhubei City (TW)
Dummy Gate Cutting Process and Resulting Gate Structures - A simplified explanation of the abstract
This abstract first appeared for US patent application 18354995 titled 'Dummy Gate Cutting Process and Resulting Gate Structures
Simplified Explanation
The patent application describes a method for forming gate isolation regions in a semiconductor device. Here are the key points:
- A dummy gate stack is formed and then etched to create an opening.
- A first dielectric layer is deposited into the opening.
- A second dielectric layer is deposited on top of the first dielectric layer and also extends into the opening.
- A planarization process is performed to create a gate isolation region using the first and second dielectric layers.
- The dummy gate stack is removed, resulting in trenches on both sides of the gate isolation region.
- Sidewall portions of the first dielectric layer are removed through a first etching process.
- The second dielectric layer is thinned through a second etching process.
- Replacement gates are formed in the trenches.
Overall, this method provides a way to create gate isolation regions and replacement gates in a semiconductor device.
Original Abstract Submitted
A method includes forming a dummy gate stack, etching the dummy gate stack to form an opening, depositing a first dielectric layer extending into the opening, and depositing a second dielectric layer on the first dielectric layer and extending into the opening. A planarization process is then performed to form a gate isolation region including the first dielectric layer and the second dielectric layer. The dummy gate stack is then removed to form trenches on opposing sides of the gate isolation region. The method further includes performing a first etching process to remove sidewall portions of the first dielectric layer, performing a second etching process to thin the second dielectric layer, and forming replacement gates in the trenches.
