US Patent Application 18349448. INTEGRATED CIRCUIT WITH SIDEWALL SPACERS FOR GATE STACKS simplified abstract

INTEGRATED CIRCUIT WITH SIDEWALL SPACERS FOR GATE STACKS

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Yen-Ting Chen of Hsinchu (TW)

Wei-Yang Lee of Taipei City (TW)

Feng-Cheng Yang of Hsinchu County (TW)

Yen-Ming Chen of Hsin-Chu County (TW)

INTEGRATED CIRCUIT WITH SIDEWALL SPACERS FOR GATE STACKS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18349448 titled 'INTEGRATED CIRCUIT WITH SIDEWALL SPACERS FOR GATE STACKS

Simplified Explanation

The patent application describes an integrated circuit with a sidewall spacer and a method for forming such a circuit.

• The method involves receiving a workpiece with a substrate and a gate stack.
• A spacer is formed on the side surface of the gate stack using a low-k dielectric material.
• A source/drain region is formed in the substrate.
• A source/drain contact is formed and positioned between the source/drain region and the gate stack, with the spacer layer in between.
• This technique allows for improved integration and performance of the integrated circuit.

Original Abstract Submitted

Various examples of an integrated circuit with a sidewall spacer and a technique for forming an integrated circuit with such a spacer are disclosed herein. In some examples, the method includes receiving a workpiece that includes a substrate and a gate stack disposed upon the substrate. A spacer is formed on a side surface of the gate stack that includes a spacer layer with a low-k dielectric material. A source/drain region is formed in the substrate; and a source/drain contact is formed coupled to the source/drain region such that the spacer layer of the spacer is disposed between the source/drain contact and the gate stack.