US Patent Application 18349267. MULTI-TERMINAL GALLIUM NITRIDE POWER TRANSISTOR simplified abstract
Contents
MULTI-TERMINAL GALLIUM NITRIDE POWER TRANSISTOR
Organization Name
Inventor(s)
Gilberto Curatola of Nuremberg (DE)
MULTI-TERMINAL GALLIUM NITRIDE POWER TRANSISTOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 18349267 titled 'MULTI-TERMINAL GALLIUM NITRIDE POWER TRANSISTOR
Simplified Explanation
The patent application is about a Gallium Nitride (GaN) power transistor.
- GaN power transistor with multiple unit cells
- Each unit cell has a source region, a drain region, and a gate region
- Source metallization layer connects the source regions to the source pad
- Drain metallization layer connects the drain regions to the drain pad
- First gate metallization layer connects the gate region of some unit cells to the first gate pad
- Second gate metallization layer connects the gate region of other unit cells to the second gate pad
Original Abstract Submitted
The present disclosure relates to a Gallium Nitride (GaN) power transistor. The GaN power transistor includes a source pad, a drain pad, a first and a second gate pad, a plurality of unit cells where each unit cell includes a source region, a drain region and a gate region. The power transitory further includes a source metallization layer contacting the source regions of the plurality of unit cells with the source pad, a drain metallization layer contacting the drain regions of the plurality of unit cells with the drain pad, a first gate metallization layer contacting the gate region of a first portion of the unit cells with the first gate pad, and a second gate metallization layer contacting the gate region of a second portion of the unit cells with the second gate pad.
