US Patent Application 18347480. GATE STRUCTURE AND METHOD simplified abstract

GATE STRUCTURE AND METHOD

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Chung-Liang Cheng of Hsinchu (TW)

GATE STRUCTURE AND METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 18347480 titled 'GATE STRUCTURE AND METHOD

Simplified Explanation

The patent application describes a device with a substrate, a semiconductor channel, and a gate structure.

• The device includes a substrate, which serves as a base for the other components.
• The semiconductor channel is located over the substrate and is responsible for controlling the flow of electrical current.
• The gate structure surrounds the semiconductor channel and includes multiple layers.
• The first layer is a dielectric layer, which provides insulation between the semiconductor channel and the other layers.
• The second layer is a metal layer with a specific work function, which helps control the behavior of the device.
• The third and fourth layers are protection layers, which provide a barrier between the metal layer and the final layer.
• The final layer is a metal fill layer, which completes the gate structure.
• The combination of these layers and their arrangement in the gate structure is the innovation described in the patent application.

Original Abstract Submitted

A device includes a substrate, a semiconductor channel over the substrate, and a gate structure over and laterally surrounding the semiconductor channel. The gate structure includes a first dielectric layer over the semiconductor channel, a first work function metal layer over the first dielectric layer, a first protection layer over the first work function metal layer, a second protection layer over the first protection layer, and a metal fill layer over the second protection layer.