US Patent Application 18344161. FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE simplified abstract

FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Hung-Ling Shih of Tainan City (TW)

Yong-Shiuan Tsair of Tainan City (TW)

FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE - A simplified explanation of the abstract

• This abstract for appeared for US patent application number 18344161 Titled 'FLOATING GATE TEST STRUCTURE FOR EMBEDDED MEMORY DEVICE'

Simplified Explanation

The abstract describes a method for creating an integrated circuit (IC) that includes memory cell structures and memory test structures. The memory test structures consist of a dummy control gate and a dummy floating gate, which are separated from the substrate. The method also involves forming a conductive floating gate test contact along the sides of the dummy control gate and the dummy floating gate.

Original Abstract Submitted

Various embodiments of the present application are directed to a method for forming an integrated circuit (IC) comprising forming a multilayer film to form a plurality of memory cell structures disposed over a substrate and a plurality of memory test structures next to the memory cell structures. A memory test structure comprises a dummy control gate separated from the substrate by a dummy floating gate. The method further comprises forming a conductive floating gate test contact via along sidewalls of the dummy control gate and the dummy floating gate.