US Patent Application 18344057. GATE ALL AROUND STRUCTURE WITH ADDITIONAL SILICON LAYER AND METHOD FOR FORMING THE SAME simplified abstract

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GATE ALL AROUND STRUCTURE WITH ADDITIONAL SILICON LAYER AND METHOD FOR FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Chen-Han Wang of Zhubei City (TW)


Pei-Hsun Wang of Kaohsiung City (TW)


Chun-Hsiung Lin of Zhubei City (TW)


Chih-Hao Wang of Baoshan Township (TW)


GATE ALL AROUND STRUCTURE WITH ADDITIONAL SILICON LAYER AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18344057 Titled 'GATE ALL AROUND STRUCTURE WITH ADDITIONAL SILICON LAYER AND METHOD FOR FORMING THE SAME'

Simplified Explanation

The abstract describes a method for manufacturing a semiconductor structure. The process involves stacking layers of different semiconductor materials on a substrate and then patterning them to create fin structures. An insulating layer is then formed around the fin structures, followed by the creation of a dielectric fin structure. Source/drain structures are formed on the first fin structure, and a semiconductor layer is added on top. This semiconductor layer is then oxidized to form an oxide layer. Finally, a second source/drain structure is formed on the second fin structure.


Original Abstract Submitted

Methods for manufacturing a semiconductor structure are provided. The method includes alternately stacking first semiconductor material layers and second semiconductor layers over a substrate and patterning the first semiconductor material layers and the second semiconductor layers to form a first fin structure and a second fin structure. The method also includes forming an insulating layer around the first fin structure and the second fin structure and forming a dielectric fin structure over the insulating layer and spaced apart from the first fin structure and the second fin structure. The method also includes forming a first source/drain structure attached to the first fin structure and forming a semiconductor layer covering the first source/drain structure. The method also includes oxidizing the semiconductor layer to form an oxide layer and forming a second source/drain structure attached to the second fin structure after the oxide layer is formed.