US Patent Application 18343972. Semiconductor Devices Including Ferroelectric Memory and Methods of Forming the Same simplified abstract
Semiconductor Devices Including Ferroelectric Memory and Methods of Forming the Same
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Sai-Hooi Yeong of Zhubei City (TW)
Semiconductor Devices Including Ferroelectric Memory and Methods of Forming the Same - A simplified explanation of the abstract
This abstract first appeared for US patent application 18343972 titled 'Semiconductor Devices Including Ferroelectric Memory and Methods of Forming the Same
Simplified Explanation
The patent application describes a semiconductor device that includes a capacitor formed over a transistor. The capacitor has a U-shaped first electrode, a ferroelectric layer, and a second electrode. The top surface of the second electrode is level with the top surface of the ferroelectric layer, and both are further from the semiconductor substrate than the topmost surface of the first electrode.
- Semiconductor device with a capacitor formed over a transistor
- The capacitor has a U-shaped first electrode
- A ferroelectric layer is placed over the first electrode
- A second electrode is placed over the ferroelectric layer
- The top surface of the second electrode is level with the top surface of the ferroelectric layer
- Both the top surface of the ferroelectric layer and the second electrode are further from the semiconductor substrate than the topmost surface of the first electrode.
Original Abstract Submitted
A semiconductor device including a capacitor, with a memory film isolating a first electrode from a contact, formed over a transistor and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate stack over a semiconductor substrate; a capacitor over the gate stack, the capacitor including a first electrode extending along a top surface of the gate stack, the first electrode being U-shaped; a first ferroelectric layer over the first electrode; and a second electrode over the first ferroelectric layer, a top surface of the second electrode being level with a top surface of the first ferroelectric layer, and the top surface of the first ferroelectric layer and the top surface of the second electrode being disposed further from the semiconductor substrate than a topmost surface of the first electrode.
