US Patent Application 18342048. TOPOLOGY SELECTIVE AND SACRIFICIAL SILICON NITRIDE LAYER FOR GENERATING SPACERS FOR A SEMICONDUCTOR DEVICE DRAIN simplified abstract

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TOPOLOGY SELECTIVE AND SACRIFICIAL SILICON NITRIDE LAYER FOR GENERATING SPACERS FOR A SEMICONDUCTOR DEVICE DRAIN

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Tzu-Yang Ho of Hsinchu (TW)


Tsai-Jung Ho of Xihu Township (TW)


Jr-Hung Li of Chupei City (TW)


Tze-Liang Lee of Hsinchu (TW)


TOPOLOGY SELECTIVE AND SACRIFICIAL SILICON NITRIDE LAYER FOR GENERATING SPACERS FOR A SEMICONDUCTOR DEVICE DRAIN - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18342048 Titled 'TOPOLOGY SELECTIVE AND SACRIFICIAL SILICON NITRIDE LAYER FOR GENERATING SPACERS FOR A SEMICONDUCTOR DEVICE DRAIN'

Simplified Explanation

The abstract describes a method for forming a metal drain in a semiconductor device. The method involves creating a layer of silicon nitride in an opening of the device and on its surface. Another layer of silicon nitride is then formed on top of the first layer, acting as a sacrificial layer. The second layer is removed from the sides of the first layer in the opening. Both layers are then removed from the bottom of the opening. Finally, a metal layer is deposited in the opening to create the metal drain.


Original Abstract Submitted

A method may include forming a first silicon nitride layer in an opening of the semiconductor device and on a top surface of the semiconductor device, wherein the semiconductor device includes an epitaxial source/drain and a metal gate. The method may include forming a second silicon nitride layer on the first silicon nitride layer, as a sacrificial layer, and removing the second silicon nitride layer from sidewalls of the first silicon nitride layer formed in the opening. The method may include removing the second silicon nitride layer and the first silicon nitride layer formed at a bottom of the opening, and depositing a metal layer in the opening to form a metal drain in the opening of the semiconductor device.